* add h8sx support to h8300
@ 2004-06-21 14:24 Alexandre Oliva
2004-06-21 17:12 ` Kazu Hirata
` (2 more replies)
0 siblings, 3 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-06-21 14:24 UTC (permalink / raw)
To: gcc-patches; +Cc: rsandifo
[-- Attachment #1: Type: text/plain, Size: 8928 bytes --]
This patch introduces support for the H8SX processor to the h8300
port. Unfortunately, h8300-elf wouldn't build out of mainline, so I
regression tested it with an older tree that built h8300-elf
successfully, without any regressions on h8300-elf (multilibs default,
-ms, -mh, and the latter two with -mint32). The patch fixes whatever
problem it was that prevented building of h8300-elf in mainline; I
didn't try to track down what exact set of changes fixed it, and I
hope I don't have to. Suffice it to say that the test results I got
in mainline after installing the patch were only slightly worse than
those in the older tree. Since the patch was the same, I think it's
reasonably safe to assume that it doesn't introduce any regressions in
mainline, but since it was totally broken before installing the patch
(and has been for quite a while), it's hard to tell. I hope this is
good enough.
There are very few changes to machine-independent code, that I enclose
as plain text below, even though they're also in the compressed patch,
such that global-write maintainers can more easily look at them and
hopefully approve them to go in along with the rest of the patch, that
should probably be reviewed by the H8 maintainers.
I'm Cc:ing Richard Sandiford, who wrote most of them, and most of the
port as well, in case clarifications on the need for the changes are
needed.
As for the change I recently wrote myself, to tree.c:get_narrower(),
the problem was that it would strip conversions from a 16-bit pointer
type to a 16-bit integer type, and then to 32 bits.
c-type.c:build_binary_op() `shorten && none_complex' code made a big
fuss about that when it passed the pointer type to int_fits_type_p(),
after c_common_signed_or_unsigned_type() returned it unchanged. I
figured stopping the conversion-stripping while we still have an
integral type (as long as we started with one) would be best.
Bootstrapped on i686-pc-linux-gnu native, and cross-built and tested
for target h8300-elf. Ok to install?
Index: gcc/builtins.c
===================================================================
RCS file: /cvs/uberbaum/gcc/builtins.c,v
retrieving revision 1.342
diff -u -p -r1.342 builtins.c
--- gcc/builtins.c 20 Jun 2004 17:03:02 -0000 1.342
+++ gcc/builtins.c 21 Jun 2004 10:57:01 -0000
@@ -3002,7 +3002,11 @@ expand_builtin_strcpy (tree arglist, rtx
len = c_strlen (src, 1);
if (len == 0 || TREE_SIDE_EFFECTS (len))
- return 0;
+ /* Try using a stpcpy pattern. If we don't need to use the
+ return value, it's better to treat this like strpcy(). */
+ return expand_strcpy (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, target == const0_rtx);
len = size_binop (PLUS_EXPR, len, ssize_int (1));
arglist = build_tree_list (NULL_TREE, len);
@@ -3043,7 +3047,9 @@ expand_builtin_stpcpy (tree arglist, rtx
when used to produce the return value. */
src = TREE_VALUE (TREE_CHAIN (arglist));
if (! c_getstr (src) || ! (len = c_strlen (src, 0)))
- return 0;
+ return expand_strcpy (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, 1);
dst = TREE_VALUE (arglist);
len = fold (size_binop (PLUS_EXPR, len, ssize_int (1)));
Index: gcc/expr.c
===================================================================
RCS file: /cvs/uberbaum/gcc/expr.c,v
retrieving revision 1.654
diff -u -p -r1.654 expr.c
--- gcc/expr.c 19 Jun 2004 15:33:05 -0000 1.654
+++ gcc/expr.c 21 Jun 2004 10:57:08 -0000
@@ -10212,4 +10212,95 @@ const_vector_from_tree (tree exp)
return gen_rtx_raw_CONST_VECTOR (mode, v);
}
+
+\f
+#ifdef HAVE_stpcpy
+static rtx expand_strcpy_arg (tree);
+static void legitimize_strcpy_operand (const struct insn_operand_data *, rtx);
+
+/* Subroutine of expand_strcpy. Return a BLKmode
+ reference to the string pointed to by ARG. */
+
+static rtx
+expand_strcpy_arg (tree arg)
+{
+ rtx addr, mem;
+
+ addr = protect_from_queue (expand_expr (arg, 0, Pmode, 0), 0);
+ mem = gen_rtx_MEM (BLKmode, memory_address (BLKmode, addr));
+ set_mem_attributes (mem, TREE_TYPE (arg), 1);
+
+ return mem;
+}
+
+/* Subroutine of expand_strcpy. If memory reference OPERAND
+ doesn't satisfy DATA, convert it into a (mem (reg)). */
+
+static void
+legitimize_strcpy_operand (const struct insn_operand_data * data,
+ rtx operand)
+{
+ if (data->predicate != 0
+ && ! data->predicate (operand, data->mode))
+ XEXP (operand, 0) = copy_to_mode_reg (Pmode, operand);
+}
+#endif
+
+/* Try to copy a string from SRC to DEST, where both SRC and DEST
+ are pointers. If ENDP, return a pointer to DEST's null terminator,
+ otherwise return a pointer to its first character. Use TARGET as
+ the destination if convenient.
+
+ Return null if the machine has no special way of implementing
+ such moves. */
+
+rtx
+expand_strcpy (tree dest ATTRIBUTE_UNUSED,
+ tree src ATTRIBUTE_UNUSED,
+ rtx target ATTRIBUTE_UNUSED,
+ int endp ATTRIBUTE_UNUSED)
+{
+#ifndef HAVE_stpcpy
+ return 0;
+#else
+ rtx end;
+ rtx dest_mem;
+ rtx src_mem;
+ rtx insn;
+ const struct insn_data * data;
+
+ if (!HAVE_stpcpy)
+ return 0;
+
+ dest_mem = expand_strcpy_arg (dest);
+ src_mem = expand_strcpy_arg (src);
+ if (!endp)
+ {
+ XEXP (dest_mem, 0) = force_reg (Pmode, XEXP (dest_mem, 0));
+ target = XEXP (dest_mem, 0);
+ end = gen_reg_rtx (Pmode);
+ }
+ else
+ {
+ if (target == 0)
+ target = gen_reg_rtx (Pmode);
+ end = target;
+ }
+
+ data = insn_data + CODE_FOR_stpcpy;
+
+ if (data->operand[0].mode != VOIDmode)
+ end = gen_lowpart (data->operand[0].mode, end);
+ legitimize_strcpy_operand (data->operand + 1, dest_mem);
+ legitimize_strcpy_operand (data->operand + 2, src_mem);
+
+ insn = data->genfun (end, dest_mem, src_mem);
+ if (insn == 0)
+ abort ();
+
+ emit_insn (insn);
+ return target;
+#endif
+}
+\f
#include "gt-expr.h"
Index: gcc/expr.h
===================================================================
RCS file: /cvs/uberbaum/gcc/expr.h,v
retrieving revision 1.158
diff -u -p -r1.158 expr.h
--- gcc/expr.h 2 Jun 2004 02:09:45 -0000 1.158
+++ gcc/expr.h 21 Jun 2004 10:57:08 -0000
@@ -501,6 +501,8 @@ extern rtx emit_move_insn_1 (rtx, rtx);
and return an rtx to address the beginning of the block. */
extern rtx push_block (rtx, int, int);
+extern rtx expand_strcpy (tree, tree, rtx, int);
+
/* Generate code to push something onto the stack, given its mode and type. */
extern void emit_push_insn (rtx, enum machine_mode, tree, rtx, unsigned int,
int, rtx, int, rtx, rtx, int, rtx);
Index: gcc/final.c
===================================================================
RCS file: /cvs/uberbaum/gcc/final.c,v
retrieving revision 1.315
diff -u -p -r1.315 final.c
--- gcc/final.c 15 Jun 2004 18:02:19 -0000 1.315
+++ gcc/final.c 21 Jun 2004 10:57:10 -0000
@@ -2655,11 +2655,13 @@ walk_alter_subreg (rtx *xp)
{
case PLUS:
case MULT:
+ case AND:
XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
break;
case MEM:
+ case ZERO_EXTEND:
XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
break;
Index: gcc/genattrtab.c
===================================================================
RCS file: /cvs/uberbaum/gcc/genattrtab.c,v
retrieving revision 1.145
diff -u -p -r1.145 genattrtab.c
--- gcc/genattrtab.c 13 May 2004 06:39:42 -0000 1.145
+++ gcc/genattrtab.c 21 Jun 2004 10:57:14 -0000
@@ -5520,6 +5520,11 @@ write_eligible_delay (const char *kind)
printf (" if (slot >= %d)\n", max_slots);
printf (" abort ();\n");
printf ("\n");
+ /* Allow dbr_schedule to pass labels, etc. This can happen if try_split
+ converts a compound instruction into a loop. */
+ printf (" if (!INSN_P (candidate_insn))\n");
+ printf (" return 0;\n");
+ printf ("\n");
/* If more than one delay type, find out which type the delay insn is. */
Index: gcc/tree.c
===================================================================
RCS file: /cvs/uberbaum/gcc/tree.c,v
retrieving revision 1.376
diff -u -p -r1.376 tree.c
--- gcc/tree.c 15 Jun 2004 18:37:32 -0000 1.376
+++ gcc/tree.c 21 Jun 2004 10:57:17 -0000
@@ -4471,6 +4471,7 @@ get_narrower (tree op, int *unsignedp_pt
int uns = 0;
int first = 1;
tree win = op;
+ bool integral_p = INTEGRAL_TYPE_P (TREE_TYPE (op));
while (TREE_CODE (op) == NOP_EXPR)
{
@@ -4507,6 +4508,10 @@ get_narrower (tree op, int *unsignedp_pt
uns = TYPE_UNSIGNED (TREE_TYPE (op));
first = 0;
op = TREE_OPERAND (op, 0);
+ /* Keep trying to narrow, but don't assign op to win if it
+ would turn an integral type into something else. */
+ if (INTEGRAL_TYPE_P (TREE_TYPE (op)) != integral_p)
+ continue;
}
win = op;
[-- Attachment #2: gcc-h8sx.patch.bz2 --]
[-- Type: application/x-bzip2, Size: 37444 bytes --]
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-06-21 14:24 add h8sx support to h8300 Alexandre Oliva
@ 2004-06-21 17:12 ` Kazu Hirata
2004-06-23 2:23 ` Alexandre Oliva
2004-07-07 22:11 ` Alexandre Oliva
2004-07-06 20:56 ` Alexandre Oliva
2004-07-07 2:37 ` Richard Henderson
2 siblings, 2 replies; 32+ messages in thread
From: Kazu Hirata @ 2004-06-21 17:12 UTC (permalink / raw)
To: aoliva; +Cc: gcc-patches, rsandifo
Hi Alex,
> Bootstrapped on i686-pc-linux-gnu native, and cross-built and tested
> for target h8300-elf. Ok to install?
The H8 portion is OK.
Thanks,
Kazu Hirata
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-06-21 17:12 ` Kazu Hirata
@ 2004-06-23 2:23 ` Alexandre Oliva
2004-07-07 22:11 ` Alexandre Oliva
1 sibling, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-06-23 2:23 UTC (permalink / raw)
To: Kazu Hirata; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 479 bytes --]
On Jun 21, 2004, Kazu Hirata <kazu@cs.umass.edu> wrote:
> Hi Alex,
>> Bootstrapped on i686-pc-linux-gnu native, and cross-built and tested
>> for target h8300-elf. Ok to install?
> The H8 portion is OK.
Ok to check it in along with these additional bits, that were
accidentally left out of the patch I posted yesterday? The changelog
already describes the results after applying the patch, leaving them
out of the patch was caused by human error while merging the changes.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: gcc-h8sx-shifts.patch --]
[-- Type: text/x-patch, Size: 4361 bytes --]
Index: gcc/config/h8300/h8300.md
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.md,v
retrieving revision 1.5
diff -u -p -r1.5 h8300.md
--- gcc/config/h8300/h8300.md 21 Jun 2004 12:16:04 -0000 1.5
+++ gcc/config/h8300/h8300.md 21 Jun 2004 18:51:01 -0000
@@ -2829,21 +2829,21 @@
(ashift:QI (match_operand:QI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (QImode, ASHIFT, operands); DONE;")
+ "if (expand_a_shift (QImode, ASHIFT, operands)) DONE;")
(define_expand "ashrqi3"
[(set (match_operand:QI 0 "register_operand" "")
(ashiftrt:QI (match_operand:QI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (QImode, ASHIFTRT, operands); DONE;")
+ "if (expand_a_shift (QImode, ASHIFTRT, operands)) DONE;")
(define_expand "lshrqi3"
[(set (match_operand:QI 0 "register_operand" "")
(lshiftrt:QI (match_operand:QI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (QImode, LSHIFTRT, operands); DONE;")
+ "if (expand_a_shift (QImode, LSHIFTRT, operands)) DONE;")
(define_insn ""
[(set (match_operand:QI 0 "h8300_dst_operand" "=rQ")
@@ -2885,21 +2885,21 @@
(ashift:HI (match_operand:HI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (HImode, ASHIFT, operands); DONE;")
+ "if (expand_a_shift (HImode, ASHIFT, operands)) DONE;")
(define_expand "lshrhi3"
[(set (match_operand:HI 0 "register_operand" "")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (HImode, LSHIFTRT, operands); DONE;")
+ "if (expand_a_shift (HImode, LSHIFTRT, operands)) DONE;")
(define_expand "ashrhi3"
[(set (match_operand:HI 0 "register_operand" "")
(ashiftrt:HI (match_operand:HI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (HImode, ASHIFTRT, operands); DONE;")
+ "if (expand_a_shift (HImode, ASHIFTRT, operands)) DONE;")
(define_insn ""
[(set (match_operand:HI 0 "h8300_dst_operand" "=rQ")
@@ -2941,21 +2941,21 @@
(ashift:SI (match_operand:SI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (SImode, ASHIFT, operands); DONE;")
+ "if (expand_a_shift (SImode, ASHIFT, operands)) DONE;")
(define_expand "lshrsi3"
[(set (match_operand:SI 0 "register_operand" "")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (SImode, LSHIFTRT, operands); DONE;")
+ "if (expand_a_shift (SImode, LSHIFTRT, operands)) DONE;")
(define_expand "ashrsi3"
[(set (match_operand:SI 0 "register_operand" "")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "")
(match_operand:QI 2 "nonmemory_operand" "")))]
""
- "expand_a_shift (SImode, ASHIFTRT, operands); DONE;")
+ "if (expand_a_shift (SImode, ASHIFTRT, operands)) DONE;")
(define_insn ""
[(set (match_operand:SI 0 "h8300_dst_operand" "=rQ")
Index: gcc/config/h8300/h8300.c
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.c,v
retrieving revision 1.5
diff -u -p -r1.5 h8300.c
--- gcc/config/h8300/h8300.c 21 Jun 2004 12:16:04 -0000 1.5
+++ gcc/config/h8300/h8300.c 21 Jun 2004 19:18:01 -0000
@@ -480,7 +480,7 @@ h8300_reg_class_from_letter (int c)
return DESTINATION_REGS;
case 'D':
- if (!regs_ever_live[FP_REG])
+ if (!regs_ever_live[HFP_REG] && !regs_ever_live[FP_REG])
return NO_REGS;
return GENERAL_REGS;
@@ -4056,7 +4056,7 @@ nshift_operator (rtx x, enum machine_mod
bool
expand_a_shift (enum machine_mode mode, int code, rtx operands[])
{
- switch (h8sx_classify_shift (mode, ROTATE, operands[2]))
+ switch (h8sx_classify_shift (mode, code, operands[2]))
{
case H8SX_SHIFT_BINARY:
operands[1] = force_reg (mode, operands[1]);
@@ -5204,6 +5204,7 @@ expand_a_rotate (enum rtx_code code, rtx
if (h8sx_classify_shift (mode, ROTATE, rotate_amount) == H8SX_SHIFT_UNARY)
return false;
+
/* We rotate in place. */
emit_move_insn (dst, src);
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-06-21 14:24 add h8sx support to h8300 Alexandre Oliva
2004-06-21 17:12 ` Kazu Hirata
@ 2004-07-06 20:56 ` Alexandre Oliva
2004-07-07 2:37 ` Richard Henderson
2 siblings, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-06 20:56 UTC (permalink / raw)
To: gcc-patches; +Cc: rsandifo
On Jun 21, 2004, Alexandre Oliva <aoliva@redhat.com> wrote:
> There are very few changes to machine-independent code, that I enclose
> as plain text below, even though they're also in the compressed patch,
> such that global-write maintainers can more easily look at them and
> hopefully approve them to go in along with the rest of the patch, that
> should probably be reviewed by the H8 maintainers.
> Bootstrapped on i686-pc-linux-gnu native, and cross-built and tested
> for target h8300-elf. Ok to install?
Ping, global-write review needed.
http://gcc.gnu.org/ml/gcc-patches/2004-06/msg01644.html
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-06-21 14:24 add h8sx support to h8300 Alexandre Oliva
2004-06-21 17:12 ` Kazu Hirata
2004-07-06 20:56 ` Alexandre Oliva
@ 2004-07-07 2:37 ` Richard Henderson
2004-07-07 7:06 ` Alexandre Oliva
2 siblings, 1 reply; 32+ messages in thread
From: Richard Henderson @ 2004-07-07 2:37 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: gcc-patches, rsandifo
The final.c, genattrtab.c, and tree.c hunks are ok.
The strcpy bits I'd like to have handled differently.
(1) Rename the existing rtl movstr patterns to movmem.
(2) Create new movstr patterns that mirror how cmpstr patterns operate.
(3) Expand strcpy/strpcpy like we do strcmp elsewhere in builtins.c.
r~
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 2:37 ` Richard Henderson
@ 2004-07-07 7:06 ` Alexandre Oliva
2004-07-07 9:06 ` Richard Henderson
2004-07-07 9:13 ` Joseph S. Myers
0 siblings, 2 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-07 7:06 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 2349 bytes --]
On Jul 6, 2004, Richard Henderson <rth@redhat.com> wrote:
> (1) Rename the existing rtl movstr patterns to movmem.
Can do. Patch is attached. Will test i686-pc-linux-gnu native
overnight. Ok to install if it passes?
> (2) Create new movstr patterns that mirror how cmpstr patterns operate.
> (3) Expand strcpy/strpcpy like we do strcmp elsewhere in builtins.c.
At first I'd got the impression h8sx didn't have an actual stpcpy
instruction but, as it turns out, Richard Sandiford actually
introduced a pattern that uses movsd and a conditional branch for
that.
On second thought, I realized I'm not sure how to best approach
introducing movstr. I suppose on most machines that can use these
patterns, we'd have some register modified in such a way that at least
movstr is pretty close to the requirements of stpcpy(), and
implementing strcpy() in terms of that would be quite trivial (just
refrain from using the modified register, and use the original one).
However, even if it's close to stpcpy(), some arches will have the
final register point one-past the NUL terminator, whereas others might
have it point to the NUL terminator itself. I suppose we should
probably model movstr exactly after stpcpy(), even if that takes an
additional increment/decrement instruction to get the right value.
This will make the pattern useful for stpcpy and strcpy, and the
additional instruction will likely be optimized away if unneeded, or
combined with other insns, unless it has the needed effect anyway.
So, should movstr be modeled exactly after stpcpy()? With a single
output operand for end-of-dest, or another for end-of-src? I don't
see that end-of-src could be used with the code we have today, but it
might if we could somehow tell GCC that the register that scanned src
got modified similarly to the one that scanned dest. Does it sound
like it might be useful to add an output operand for end-of-src to the
standard pattern?
E.g.:
(define_expand "movstrsi"
;; intuitive notion of the implementation:
[(set (match_operand:BLK 0 "" "") ;; dest
(match_operand:BLK 1 "" "")) ;; src
;; wouldn't it be so nice if :P was a valid mode? :-)
(clobber (match_operand:P 2 "" "")) ;; end-of-dest
(clobber (match_operand:P 3 "" "")) ;; end-of-src
] ...)
Should we perhaps make operands 3, and maybe even 2, optional?
[-- Attachment #2: gcc-mov-clr-str2mem.patch --]
[-- Type: text/x-patch, Size: 94569 bytes --]
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* builtins.c: Rename movstr*, except for movstrict*, to
movmem* and clrstr* to clrmem*.
* expr.c: Likewise.
* expr.h: Likewise.
* genopinit.c: Likewise.
* integrate.c: Likewise.
* local-alloc.c: Likewise.
* optabs.c: Likewise.
* optabs.h: Likewise.
* config/alpha/alpha.h: Likewise.
* config/alpha/alpha.md: Likewise.
* config/arm/arm-protos.h: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/arm.md: Likewise.
* config/avr/avr.md: Likewise.
* config/c4x/c4x.c: Likewise.
* config/c4x/c4x.md: Likewise.
* config/frv/frv.md: Likewise.
* config/i386/i386-protos.h: Likewise.
* config/i386/i386.c: Likewise.
* config/i386/i386.h: Likewise.
* config/i386/i386.md: Likewise.
* config/i860/i860.c: Likewise.
* config/i860/i860.md: Likewise.
* config/ip2k/ip2k.md: Likewise.
* config/ip2k/libgcc.S: Likewise.
* config/ip2k/t-ip2k: Likewise.
* config/m32r/m32r.c: Likewise.
* config/m32r/m32r.md: Likewise.
* config/mcore/mcore.md: Likewise.
* config/mips/mips.c: Likewise.
* config/mips/mips.md: Likewise.
* config/ns32k/ns32k.c: Likewise.
* config/ns32k/ns32k.h: Likewise.
* config/ns32k/ns32k.md: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa.md: Likewise.
* config/pdp11/pdp11.h: Likewise.
* config/pdp11/pdp11.md: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.md: Likewise.
* config/s390/s390-protos.h: Likewise.
* config/s390/s390.c: Likewise.
* config/s390/s390.md: Likewise.
* config/sh/lib1funcs.asm: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/t-sh: Likewise.
* config/sparc/sparc.h: Likewise.
* config/vax/vax.md: Likewise.
* config/xtensa/xtensa.c: Likewise.
* config/xtensa/xtensa.md: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
* doc/rtl.texi: Likewise.
Index: gcc/po/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* po/gcc.pot: Rename movstr*, except for movstrict*, to
movmem* and clrstr* to clrmem*.
* po/be.po: Likewise.
* po/ca.po: Likewise.
* po/da.po: Likewise.
* po/de.po: Likewise.
* po/el.po: Likewise.
* po/es.po: Likewise.
* po/fr.po: Likewise.
* po/ja.po: Likewise.
* po/nl.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
Index: gcc/testsuite/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* gcc.c-torture/execute/builtins/mempcpy-2.c: Rename movstr*,
except for movstrict*, to movmem* and clrstr* to clrmem*.
Index: gcc/builtins.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/builtins.c,v
retrieving revision 1.346
diff -u -p -r1.346 builtins.c
--- gcc/builtins.c 1 Jul 2004 12:52:33 -0000 1.346
+++ gcc/builtins.c 7 Jul 2004 06:16:03 -0000
@@ -970,7 +970,7 @@ expand_builtin_prefetch (tree arglist)
}
/* Get a MEM rtx for expression EXP which is the address of an operand
- to be used to be used in a string instruction (cmpstrsi, movstrsi, ..). */
+ to be used to be used in a string instruction (cmpstrsi, movmemsi, ..). */
static rtx
get_memory_rtx (tree exp)
Index: gcc/expr.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expr.c,v
retrieving revision 1.670
diff -u -p -r1.670 expr.c
--- gcc/expr.c 6 Jul 2004 20:01:08 -0000 1.670
+++ gcc/expr.c 7 Jul 2004 06:16:10 -0000
@@ -125,7 +125,7 @@ static unsigned HOST_WIDE_INT move_by_pi
static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
struct move_by_pieces *);
static bool block_move_libcall_safe_for_call_parm (void);
-static bool emit_block_move_via_movstr (rtx, rtx, rtx, unsigned);
+static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned);
static rtx emit_block_move_via_libcall (rtx, rtx, rtx);
static tree emit_block_move_libcall_fn (int);
static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
@@ -134,7 +134,7 @@ static void clear_by_pieces (rtx, unsign
static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
struct store_by_pieces *);
-static bool clear_storage_via_clrstr (rtx, rtx, unsigned);
+static bool clear_storage_via_clrmem (rtx, rtx, unsigned);
static rtx clear_storage_via_libcall (rtx, rtx);
static tree clear_storage_libcall_fn (int);
static rtx compress_float_constant (rtx, rtx);
@@ -194,10 +194,10 @@ static bool float_extend_from_mem[NUM_MA
#endif
/* This array records the insn_code of insns to perform block moves. */
-enum insn_code movstr_optab[NUM_MACHINE_MODES];
+enum insn_code movmem_optab[NUM_MACHINE_MODES];
/* This array records the insn_code of insns to perform block clears. */
-enum insn_code clrstr_optab[NUM_MACHINE_MODES];
+enum insn_code clrmem_optab[NUM_MACHINE_MODES];
/* These arrays record the insn_code of two different kinds of insns
to perform block compares. */
@@ -1372,7 +1372,7 @@ emit_block_move (rtx x, rtx y, rtx size,
if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
move_by_pieces (x, y, INTVAL (size), align, 0);
- else if (emit_block_move_via_movstr (x, y, size, align))
+ else if (emit_block_move_via_movmem (x, y, size, align))
;
else if (may_use_call)
retval = emit_block_move_via_libcall (x, y, size);
@@ -1434,11 +1434,11 @@ block_move_libcall_safe_for_call_parm (v
return true;
}
-/* A subroutine of emit_block_move. Expand a movstr pattern;
+/* A subroutine of emit_block_move. Expand a movmem pattern;
return true if successful. */
static bool
-emit_block_move_via_movstr (rtx x, rtx y, rtx size, unsigned int align)
+emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align)
{
rtx opalign = GEN_INT (align / BITS_PER_UNIT);
int save_volatile_ok = volatile_ok;
@@ -1454,7 +1454,7 @@ emit_block_move_via_movstr (rtx x, rtx y
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- enum insn_code code = movstr_optab[(int) mode];
+ enum insn_code code = movmem_optab[(int) mode];
insn_operand_predicate_fn pred;
if (code != CODE_FOR_nothing
@@ -2543,7 +2543,7 @@ clear_storage (rtx object, rtx size)
else if (GET_CODE (size) == CONST_INT
&& CLEAR_BY_PIECES_P (INTVAL (size), align))
clear_by_pieces (object, INTVAL (size), align);
- else if (clear_storage_via_clrstr (object, size, align))
+ else if (clear_storage_via_clrmem (object, size, align))
;
else
retval = clear_storage_via_libcall (object, size);
@@ -2552,11 +2552,11 @@ clear_storage (rtx object, rtx size)
return retval;
}
-/* A subroutine of clear_storage. Expand a clrstr pattern;
+/* A subroutine of clear_storage. Expand a clrmem pattern;
return true if successful. */
static bool
-clear_storage_via_clrstr (rtx object, rtx size, unsigned int align)
+clear_storage_via_clrmem (rtx object, rtx size, unsigned int align)
{
/* Try the most limited insn first, because there's no point
including more than one in the machine description unless
@@ -2568,7 +2568,7 @@ clear_storage_via_clrstr (rtx object, rt
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- enum insn_code code = clrstr_optab[(int) mode];
+ enum insn_code code = clrmem_optab[(int) mode];
insn_operand_predicate_fn pred;
if (code != CODE_FOR_nothing
Index: gcc/expr.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expr.h,v
retrieving revision 1.159
diff -u -p -r1.159 expr.h
--- gcc/expr.h 24 Jun 2004 13:47:49 -0000 1.159
+++ gcc/expr.h 7 Jul 2004 06:16:10 -0000
@@ -82,10 +82,10 @@ enum expand_modifier {EXPAND_NORMAL = 0,
#define OK_DEFER_POP (inhibit_defer_pop -= 1)
\f
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction sequences, we will do a movstr or libcall instead. */
+ move-instruction sequences, we will do a movmem or libcall instead. */
#ifndef MOVE_RATIO
-#if defined (HAVE_movstrqi) || defined (HAVE_movstrhi) || defined (HAVE_movstrsi) || defined (HAVE_movstrdi) || defined (HAVE_movstrti)
+#if defined (HAVE_movmemqi) || defined (HAVE_movmemhi) || defined (HAVE_movmemsi) || defined (HAVE_movmemdi) || defined (HAVE_movmemti)
#define MOVE_RATIO 2
#else
/* If we are optimizing for space (-Os), cut down the default move ratio. */
@@ -94,10 +94,10 @@ enum expand_modifier {EXPAND_NORMAL = 0,
#endif
/* If a clear memory operation would take CLEAR_RATIO or more simple
- move-instruction sequences, we will do a clrstr or libcall instead. */
+ move-instruction sequences, we will do a clrmem or libcall instead. */
#ifndef CLEAR_RATIO
-#if defined (HAVE_clrstrqi) || defined (HAVE_clrstrhi) || defined (HAVE_clrstrsi) || defined (HAVE_clrstrdi) || defined (HAVE_clrstrti)
+#if defined (HAVE_clrmemqi) || defined (HAVE_clrmemhi) || defined (HAVE_clrmemsi) || defined (HAVE_clrmemdi) || defined (HAVE_clrmemti)
#define CLEAR_RATIO 2
#else
/* If we are optimizing for space, cut down the default clear ratio. */
Index: gcc/genopinit.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/genopinit.c,v
retrieving revision 1.75
diff -u -p -r1.75 genopinit.c
--- gcc/genopinit.c 7 May 2004 05:38:14 -0000 1.75
+++ gcc/genopinit.c 7 Jul 2004 06:16:11 -0000
@@ -162,8 +162,8 @@ static const char * const optabs[] =
"push_optab->handlers[$A].insn_code = CODE_FOR_$(push$a1$)",
"reload_in_optab[$A] = CODE_FOR_$(reload_in$a$)",
"reload_out_optab[$A] = CODE_FOR_$(reload_out$a$)",
- "movstr_optab[$A] = CODE_FOR_$(movstr$a$)",
- "clrstr_optab[$A] = CODE_FOR_$(clrstr$a$)",
+ "movmem_optab[$A] = CODE_FOR_$(movmem$a$)",
+ "clrmem_optab[$A] = CODE_FOR_$(clrmem$a$)",
"cmpstr_optab[$A] = CODE_FOR_$(cmpstr$a$)",
"cmpmem_optab[$A] = CODE_FOR_$(cmpmem$a$)",
"vec_set_optab->handlers[$A].insn_code = CODE_FOR_$(vec_set$a$)",
Index: gcc/integrate.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/integrate.c,v
retrieving revision 1.263
diff -u -p -r1.263 integrate.c
--- gcc/integrate.c 6 Jul 2004 02:20:09 -0000 1.263
+++ gcc/integrate.c 7 Jul 2004 06:16:11 -0000
@@ -367,7 +367,7 @@ copy_rtx_and_substitute (rtx orig, struc
case CLOBBER:
/* USE and CLOBBER are ordinary, but we convert (use (subreg foo))
to (use foo) if the original insn didn't have a subreg.
- Removing the subreg distorts the VAX movstrhi pattern
+ Removing the subreg distorts the VAX movmemhi pattern
by changing the mode of an operand. */
copy = copy_rtx_and_substitute (XEXP (orig, 0), map, code == CLOBBER);
if (GET_CODE (copy) == SUBREG && GET_CODE (XEXP (orig, 0)) != SUBREG)
Index: gcc/local-alloc.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/local-alloc.c,v
retrieving revision 1.132
diff -u -p -r1.132 local-alloc.c
--- gcc/local-alloc.c 1 Jul 2004 12:52:46 -0000 1.132
+++ gcc/local-alloc.c 7 Jul 2004 06:16:13 -0000
@@ -1724,7 +1724,7 @@ qty_sugg_compare_1 (const void *q1p, con
We don't actually combine a hard reg with a pseudo; instead
we just record the hard reg as the suggestion for the pseudo's quantity.
If we really combined them, we could lose if the pseudo lives
- across an insn that clobbers the hard reg (eg, movstr).
+ across an insn that clobbers the hard reg (eg, movmem).
ALREADY_DEAD is nonzero if USEDREG is known to be dead even though
there is no REG_DEAD note on INSN. This occurs during the processing
Index: gcc/optabs.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.c,v
retrieving revision 1.226
diff -u -p -r1.226 optabs.c
--- gcc/optabs.c 5 Jul 2004 19:49:11 -0000 1.226
+++ gcc/optabs.c 7 Jul 2004 06:16:16 -0000
@@ -5422,8 +5422,8 @@ init_optabs (void)
for (i = 0; i < NUM_MACHINE_MODES; i++)
{
- movstr_optab[i] = CODE_FOR_nothing;
- clrstr_optab[i] = CODE_FOR_nothing;
+ movmem_optab[i] = CODE_FOR_nothing;
+ clrmem_optab[i] = CODE_FOR_nothing;
cmpstr_optab[i] = CODE_FOR_nothing;
cmpmem_optab[i] = CODE_FOR_nothing;
Index: gcc/optabs.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.h,v
retrieving revision 1.29
diff -u -p -r1.29 optabs.h
--- gcc/optabs.h 7 May 2004 05:38:14 -0000 1.29
+++ gcc/optabs.h 7 Jul 2004 06:16:16 -0000
@@ -391,10 +391,10 @@ extern enum insn_code movcc_gen_code[NUM
#endif
/* This array records the insn_code of insns to perform block moves. */
-extern enum insn_code movstr_optab[NUM_MACHINE_MODES];
+extern enum insn_code movmem_optab[NUM_MACHINE_MODES];
/* This array records the insn_code of insns to perform block clears. */
-extern enum insn_code clrstr_optab[NUM_MACHINE_MODES];
+extern enum insn_code clrmem_optab[NUM_MACHINE_MODES];
/* These arrays record the insn_code of two different kinds of insns
to perform block compares. */
Index: gcc/config/alpha/alpha.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.h,v
retrieving revision 1.221
diff -u -p -r1.221 alpha.h
--- gcc/config/alpha/alpha.h 5 Jul 2004 19:49:11 -0000 1.221
+++ gcc/config/alpha/alpha.h 7 Jul 2004 06:16:19 -0000
@@ -1347,7 +1347,7 @@ do { \
#define MOVE_MAX 8
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead.
+ move-instruction pairs, we will do a movmem or libcall instead.
Without byte/word accesses, we want no more than four instructions;
with, several single byte accesses are better. */
Index: gcc/config/alpha/alpha.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.md,v
retrieving revision 1.222
diff -u -p -r1.222 alpha.md
--- gcc/config/alpha/alpha.md 1 May 2004 12:26:28 -0000 1.222
+++ gcc/config/alpha/alpha.md 7 Jul 2004 06:16:22 -0000
@@ -6431,7 +6431,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "immediate_operand" ""))
@@ -6444,7 +6444,7 @@
FAIL;
})
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "immediate_operand" ""))
@@ -6464,7 +6464,7 @@
alpha_need_linkage (XSTR (operands[4], 0), 0);
})
-(define_insn "*movstrdi_1"
+(define_insn "*movmemdi_1"
[(set (match_operand:BLK 0 "memory_operand" "=m,=m")
(match_operand:BLK 1 "memory_operand" "m,m"))
(use (match_operand:DI 2 "nonmemory_operand" "r,i"))
@@ -6494,7 +6494,7 @@
[(set_attr "type" "multi")
(set_attr "length" "28")])
-(define_expand "clrstrqi"
+(define_expand "clrmemqi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "immediate_operand" ""))
@@ -6507,7 +6507,7 @@
FAIL;
})
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "immediate_operand" ""))
@@ -6524,7 +6524,7 @@
alpha_need_linkage (XSTR (operands[3], 0), 0);
})
-(define_insn "*clrstrdi_1"
+(define_insn "*clrmemdi_1"
[(set (match_operand:BLK 0 "memory_operand" "=m,=m")
(const_int 0))
(use (match_operand:DI 1 "nonmemory_operand" "r,i"))
Index: gcc/config/arm/arm-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm-protos.h,v
retrieving revision 1.68
diff -u -p -r1.68 arm-protos.h
--- gcc/config/arm/arm-protos.h 5 May 2004 23:11:52 -0000 1.68
+++ gcc/config/arm/arm-protos.h 7 Jul 2004 06:16:22 -0000
@@ -118,7 +118,7 @@ extern int store_multiple_sequence (rtx
extern const char * emit_stm_seq (rtx *, int);
extern rtx arm_gen_load_multiple (int, int, rtx, int, int, int, int, int);
extern rtx arm_gen_store_multiple (int, int, rtx, int, int, int, int, int);
-extern int arm_gen_movstrqi (rtx *);
+extern int arm_gen_movmemqi (rtx *);
extern rtx arm_gen_rotated_half_load (rtx);
extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
@@ -189,7 +189,7 @@ extern int thumb_shiftable_const (unsign
extern void thumb_final_prescan_insn (rtx);
extern const char *thumb_load_double_from_address (rtx *);
extern const char *thumb_output_move_mem_multiple (int, rtx *);
-extern void thumb_expand_movstrqi (rtx *);
+extern void thumb_expand_movmemqi (rtx *);
extern int thumb_cmp_operand (rtx, enum machine_mode);
extern int thumb_cbrch_target_operand (rtx, enum machine_mode);
extern rtx *thumb_legitimize_pic_address (rtx, enum machine_mode, rtx);
Index: gcc/config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.371
diff -u -p -r1.371 arm.c
--- gcc/config/arm/arm.c 6 Jul 2004 21:21:23 -0000 1.371
+++ gcc/config/arm/arm.c 7 Jul 2004 06:16:30 -0000
@@ -5924,7 +5924,7 @@ arm_gen_store_multiple (int base_regno,
}
int
-arm_gen_movstrqi (rtx *operands)
+arm_gen_movmemqi (rtx *operands)
{
HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
int i;
@@ -13811,7 +13811,7 @@ thumb_output_move_mem_multiple (int n, r
/* Routines for generating rtl. */
void
-thumb_expand_movstrqi (rtx *operands)
+thumb_expand_movmemqi (rtx *operands)
{
rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
rtx in = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
Index: gcc/config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.172
diff -u -p -r1.172 arm.md
--- gcc/config/arm/arm.md 30 Jun 2004 09:17:43 -0000 1.172
+++ gcc/config/arm/arm.md 7 Jul 2004 06:16:34 -0000
@@ -5493,7 +5493,7 @@
;; We could let this apply for blocks of less than this, but it clobbers so
;; many registers that there is then probably a better way.
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" "")
(match_operand:SI 2 "const_int_operand" "")
@@ -5502,7 +5502,7 @@
"
if (TARGET_ARM)
{
- if (arm_gen_movstrqi (operands))
+ if (arm_gen_movmemqi (operands))
DONE;
FAIL;
}
@@ -5512,7 +5512,7 @@
|| INTVAL (operands[2]) > 48)
FAIL;
- thumb_expand_movstrqi (operands);
+ thumb_expand_movmemqi (operands);
DONE;
}
"
Index: gcc/config/avr/avr.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.md,v
retrieving revision 1.45
diff -u -p -r1.45 avr.md
--- gcc/config/avr/avr.md 19 Mar 2004 20:07:54 -0000 1.45
+++ gcc/config/avr/avr.md 7 Jul 2004 06:16:35 -0000
@@ -345,7 +345,7 @@
;;=========================================================================
;; move string (like memcpy)
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:HI 2 "const_int_operand" ""))
@@ -376,7 +376,7 @@
operands[1] = gen_rtx_MEM (BLKmode, addr1);
}")
-(define_insn "*movstrqi_insn"
+(define_insn "*movmemqi_insn"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e"))
(mem:BLK (match_operand:HI 1 "register_operand" "e")))
(use (match_operand:QI 2 "register_operand" "r"))
@@ -392,7 +392,7 @@
[(set_attr "length" "4")
(set_attr "cc" "clobber")])
-(define_insn "*movstrhi"
+(define_insn "*movmemhi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e,e"))
(mem:BLK (match_operand:HI 1 "register_operand" "e,e")))
(use (match_operand:HI 2 "register_operand" "!w,d"))
@@ -420,7 +420,7 @@
;; =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0
;; memset (%0, 0, %1)
-(define_expand "clrstrhi"
+(define_expand "clrmemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:HI 1 "const_int_operand" ""))
@@ -448,7 +448,7 @@
operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
-(define_insn "*clrstrqi"
+(define_insn "*clrmemqi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e"))
(const_int 0))
(use (match_operand:QI 1 "register_operand" "r"))
@@ -462,7 +462,7 @@
[(set_attr "length" "3")
(set_attr "cc" "clobber")])
-(define_insn "*clrstrhi"
+(define_insn "*clrmemhi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e,e"))
(const_int 0))
(use (match_operand:HI 1 "register_operand" "!w,d"))
Index: gcc/config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.150
diff -u -p -r1.150 c4x.c
--- gcc/config/c4x/c4x.c 4 Jul 2004 08:07:05 -0000 1.150
+++ gcc/config/c4x/c4x.c 7 Jul 2004 06:16:37 -0000
@@ -2348,7 +2348,7 @@ c4x_rptb_insert (rtx insn)
rtx count_reg;
/* If the count register has not been allocated to RC, say if
- there is a movstr pattern in the loop, then do not insert a
+ there is a movmem pattern in the loop, then do not insert a
RPTB instruction. Instead we emit a decrement and branch
at the end of the loop. */
count_reg = XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0), 0);
Index: gcc/config/c4x/c4x.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.md,v
retrieving revision 1.89
diff -u -p -r1.89 c4x.md
--- gcc/config/c4x/c4x.md 30 Jun 2004 09:32:41 -0000 1.89
+++ gcc/config/c4x/c4x.md 7 Jul 2004 06:16:40 -0000
@@ -5574,7 +5574,7 @@
"0"
"")
-(define_expand "movstrqi_small"
+(define_expand "movmemqi_small"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "src_operand" ""))
(mem:BLK (match_operand:BLK 1 "src_operand" "")))
(use (match_operand:QI 2 "immediate_operand" ""))
@@ -5634,7 +5634,7 @@
; operand 3 is the shared alignment
; operand 4 is a scratch register
-(define_insn "movstrqi_large"
+(define_insn "movmemqi_large"
[(set (mem:BLK (match_operand:QI 0 "addr_reg_operand" "a"))
(mem:BLK (match_operand:QI 1 "addr_reg_operand" "a")))
(use (match_operand:QI 2 "immediate_operand" "i"))
@@ -5681,7 +5681,7 @@
[(set_attr "type" "multi")])
; Operand 2 is the count, operand 3 is the alignment.
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "src_operand" ""))
(mem:BLK (match_operand:BLK 1 "src_operand" "")))
(use (match_operand:QI 2 "immediate_operand" ""))
@@ -5702,11 +5702,11 @@
tmp = gen_reg_rtx (QImode);
/* Disabled because of reload problems. */
if (0 && INTVAL (operands[2]) < 8)
- emit_insn (gen_movstrqi_small (operands[0], operands[1], operands[2],
+ emit_insn (gen_movmemqi_small (operands[0], operands[1], operands[2],
operands[3], tmp));
else
{
- emit_insn (gen_movstrqi_large (operands[0], operands[1], operands[2],
+ emit_insn (gen_movmemqi_large (operands[0], operands[1], operands[2],
operands[3], tmp));
}
DONE;
Index: gcc/config/frv/frv.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.md,v
retrieving revision 1.15
diff -u -p -r1.15 frv.md
--- gcc/config/frv/frv.md 3 May 2004 02:16:16 -0000 1.15
+++ gcc/config/frv/frv.md 7 Jul 2004 06:16:43 -0000
@@ -1835,7 +1835,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "" ""))
@@ -1854,7 +1854,7 @@
;; Argument 1 is the length
;; Argument 2 is the alignment
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(use (match_operand:SI 1 "" ""))
Index: gcc/config/i386/i386-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386-protos.h,v
retrieving revision 1.112
diff -u -p -r1.112 i386-protos.h
--- gcc/config/i386/i386-protos.h 6 Jul 2004 22:40:16 -0000 1.112
+++ gcc/config/i386/i386-protos.h 7 Jul 2004 06:16:43 -0000
@@ -95,8 +95,8 @@ extern int long_memory_operand (rtx, enu
extern int aligned_operand (rtx, enum machine_mode);
extern enum machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx);
-extern int ix86_expand_movstr (rtx, rtx, rtx, rtx);
-extern int ix86_expand_clrstr (rtx, rtx, rtx);
+extern int ix86_expand_movmem (rtx, rtx, rtx, rtx);
+extern int ix86_expand_clrmem (rtx, rtx, rtx);
extern int ix86_expand_strlen (rtx, rtx, rtx, rtx);
extern bool legitimate_constant_p (rtx);
Index: gcc/config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.681
diff -u -p -r1.681 i386.c
--- gcc/config/i386/i386.c 6 Jul 2004 22:40:16 -0000 1.681
+++ gcc/config/i386/i386.c 7 Jul 2004 06:16:54 -0000
@@ -11103,9 +11103,9 @@ ix86_zero_extend_to_Pmode (rtx exp)
}
/* Expand string move (memcpy) operation. Use i386 string operations when
- profitable. expand_clrstr contains similar code. */
+ profitable. expand_clrmem contains similar code. */
int
-ix86_expand_movstr (rtx dst, rtx src, rtx count_exp, rtx align_exp)
+ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
{
rtx srcreg, destreg, countreg, srcexp, destexp;
enum machine_mode counter_mode;
@@ -11382,9 +11382,9 @@ ix86_expand_movstr (rtx dst, rtx src, rt
}
/* Expand string clear operation (bzero). Use i386 string operations when
- profitable. expand_movstr contains similar code. */
+ profitable. expand_movmem contains similar code. */
int
-ix86_expand_clrstr (rtx dst, rtx count_exp, rtx align_exp)
+ix86_expand_clrmem (rtx dst, rtx count_exp, rtx align_exp)
{
rtx destreg, zeroreg, countreg, destexp;
enum machine_mode counter_mode;
Index: gcc/config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.387
diff -u -p -r1.387 i386.h
--- gcc/config/i386/i386.h 21 Jun 2004 20:41:38 -0000 1.387
+++ gcc/config/i386/i386.h 7 Jul 2004 06:16:57 -0000
@@ -2529,7 +2529,7 @@ enum ix86_builtins
#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead.
+ move-instruction pairs, we will do a movmem or libcall instead.
Increasing the value will always make code faster, but eventually
incurs high cost in increased code size.
Index: gcc/config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.546
diff -u -p -r1.546 i386.md
--- gcc/config/i386/i386.md 24 Jun 2004 17:54:13 -0000 1.546
+++ gcc/config/i386/i386.md 7 Jul 2004 06:17:06 -0000
@@ -16410,27 +16410,27 @@
"cld"
[(set_attr "type" "cld")])
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" ""))
(use (match_operand:SI 3 "const_int_operand" ""))]
"! optimize_size"
{
- if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3]))
+ if (ix86_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
})
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "nonmemory_operand" ""))
(use (match_operand:DI 3 "const_int_operand" ""))]
"TARGET_64BIT"
{
- if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3]))
+ if (ix86_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
@@ -16698,25 +16698,25 @@
(set_attr "memory" "both")
(set_attr "mode" "SI")])
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:SI 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))]
""
{
- if (ix86_expand_clrstr (operands[0], operands[1], operands[2]))
+ if (ix86_expand_clrmem (operands[0], operands[1], operands[2]))
DONE;
else
FAIL;
})
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:DI 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))]
"TARGET_64BIT"
{
- if (ix86_expand_clrstr (operands[0], operands[1], operands[2]))
+ if (ix86_expand_clrmem (operands[0], operands[1], operands[2]))
DONE;
else
FAIL;
Index: gcc/config/i860/i860.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i860/i860.c,v
retrieving revision 1.44
diff -u -p -r1.44 i860.c
--- gcc/config/i860/i860.c 22 Jun 2004 03:06:47 -0000 1.44
+++ gcc/config/i860/i860.c 7 Jul 2004 06:17:07 -0000
@@ -1014,7 +1014,7 @@ output_block_move (rtx *operands)
#if 0
rtx zoperands[10];
#endif
- static int movstrsi_label = 0;
+ static int movmemsi_label = 0;
int i;
rtx temp1 = operands[4];
rtx alignrtx = operands[3];
@@ -1115,7 +1115,7 @@ output_block_move (rtx *operands)
/* Generate number for unique label. */
- xoperands[3] = GEN_INT (movstrsi_label++);
+ xoperands[3] = GEN_INT (movmemsi_label++);
/* Calculate the size of the chunks we will be trying to move first. */
Index: gcc/config/i860/i860.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i860/i860.md,v
retrieving revision 1.16
diff -u -p -r1.16 i860.md
--- gcc/config/i860/i860.md 23 Aug 2003 02:30:35 -0000 1.16
+++ gcc/config/i860/i860.md 7 Jul 2004 06:17:08 -0000
@@ -1010,7 +1010,7 @@
;; but it should suffice
;; that anything generated as this insn will be recognized as one
;; and that it won't successfully combine with anything.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" ""))
Index: gcc/config/ip2k/ip2k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k.md,v
retrieving revision 1.11
diff -u -p -r1.11 ip2k.md
--- gcc/config/ip2k/ip2k.md 4 Feb 2004 20:00:59 -0000 1.11
+++ gcc/config/ip2k/ip2k.md 7 Jul 2004 06:17:10 -0000
@@ -864,7 +864,7 @@
;; Copy a block of bytes (memcpy()). We expand the definition to convert
;; our memory operand into a register pointer operand instead.
;;
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:HI 2 "general_operand" ""))
@@ -881,7 +881,7 @@
else
count = operands[2];
- emit_insn (gen_movstrhi_expanded (addr0, count, addr1));
+ emit_insn (gen_movmemhi_expanded (addr0, count, addr1));
DONE;
}")
@@ -892,7 +892,7 @@
;; the general case where we have either a variable block size or one that is
;; greater than 255 bytes.
;;
-(define_insn "movstrhi_expanded"
+(define_insn "movmemhi_expanded"
[(set
(mem:BLK
(match_operand:HI 0 "nonimmediate_operand" "rS,ro,rS, rS, ro, rS"))
@@ -902,12 +902,12 @@
(match_operand:HI 1 "general_operand" "P, P, P,rSi,rSi,roi"))]
""
"@
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi")
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi")
\f
;; Bit insert
Index: gcc/config/ip2k/libgcc.S
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/libgcc.S,v
retrieving revision 1.6
diff -u -p -r1.6 libgcc.S
--- gcc/config/ip2k/libgcc.S 15 Mar 2004 18:20:48 -0000 1.6
+++ gcc/config/ip2k/libgcc.S 7 Jul 2004 06:17:10 -0000
@@ -1374,12 +1374,12 @@ __leaf_fp_pop_args_ret:
.endfunc
#endif /* L_leaf_fp_pop_args_ret */
-#if defined(L_movstrhi_countqi)
+#if defined(L_movmemhi_countqi)
.sect .pram.libgcc,"ax"
- .global __movstrhi_countqi
- .func _movstrhi_countqi, __movstrhi_countqi
+ .global __movmemhi_countqi
+ .func _movmemhi_countqi, __movmemhi_countqi
-__movstrhi_countqi:
+__movmemhi_countqi:
push dph ; Save our pointer regs
push dpl
push iph
@@ -1414,12 +1414,12 @@ __movstrhi_countqi:
.endfunc
#endif
-#if defined(L_movstrhi_counthi)
+#if defined(L_movmemhi_counthi)
.sect .text.libgcc,"ax"
- .global __movstrhi_counthi
- .func _movstrhi_counthi, __movstrhi_counthi
+ .global __movmemhi_counthi
+ .func _movmemhi_counthi, __movmemhi_counthi
-__movstrhi_counthi:
+__movmemhi_counthi:
push dph ; Save our pointer regs
push dpl
push iph
Index: gcc/config/ip2k/t-ip2k
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/t-ip2k,v
retrieving revision 1.3
diff -u -p -r1.3 t-ip2k
--- gcc/config/ip2k/t-ip2k 10 Oct 2002 19:45:59 -0000 1.3
+++ gcc/config/ip2k/t-ip2k 7 Jul 2004 06:17:10 -0000
@@ -19,8 +19,8 @@ LIB1ASMFUNCS = \
_fp_pop_args_ret \
_pop2_args_ret \
_leaf_fp_pop_args_ret \
- _movstrhi_countqi \
- _movstrhi_counthi \
+ _movmemhi_countqi \
+ _movmemhi_counthi \
abort \
_exit
Index: gcc/config/m32r/m32r.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.c,v
retrieving revision 1.95
diff -u -p -r1.95 m32r.c
--- gcc/config/m32r/m32r.c 5 Jul 2004 19:49:15 -0000 1.95
+++ gcc/config/m32r/m32r.c 7 Jul 2004 06:17:12 -0000
@@ -2692,7 +2692,7 @@ m32r_expand_block_move (rtx operands[])
to the word after the end of the source block, and dst_reg to point
to the last word of the destination block, provided that the block
is MAX_MOVE_BYTES long. */
- emit_insn (gen_movstrsi_internal (dst_reg, src_reg, at_a_time,
+ emit_insn (gen_movmemsi_internal (dst_reg, src_reg, at_a_time,
new_dst_reg, new_src_reg));
emit_move_insn (dst_reg, new_dst_reg);
emit_move_insn (src_reg, new_src_reg);
@@ -2706,7 +2706,7 @@ m32r_expand_block_move (rtx operands[])
}
if (leftover)
- emit_insn (gen_movstrsi_internal (dst_reg, src_reg, GEN_INT (leftover),
+ emit_insn (gen_movmemsi_internal (dst_reg, src_reg, GEN_INT (leftover),
gen_reg_rtx (SImode),
gen_reg_rtx (SImode)));
}
Index: gcc/config/m32r/m32r.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.md,v
retrieving revision 1.45
diff -u -p -r1.45 m32r.md
--- gcc/config/m32r/m32r.md 28 Jun 2004 22:39:21 -0000 1.45
+++ gcc/config/m32r/m32r.md 7 Jul 2004 06:17:13 -0000
@@ -2522,7 +2522,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" ""))
(use (match_operand:SI 2 "immediate_operand" ""))
@@ -2539,7 +2539,7 @@
;; Insn generated by block moves
-(define_insn "movstrsi_internal"
+(define_insn "movmemsi_internal"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r")) ;; destination
(mem:BLK (match_operand:SI 1 "register_operand" "r"))) ;; source
(use (match_operand:SI 2 "m32r_block_immediate_operand" "J"));; # bytes to move
Index: gcc/config/mcore/mcore.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mcore/mcore.md,v
retrieving revision 1.17
diff -u -p -r1.17 mcore.md
--- gcc/config/mcore/mcore.md 6 Jul 2004 07:12:32 -0000 1.17
+++ gcc/config/mcore/mcore.md 7 Jul 2004 06:17:14 -0000
@@ -2846,7 +2846,7 @@
;; Block move - adapted from m88k.md
;; ------------------------------------------------------------------------
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "" ""))
(mem:BLK (match_operand:BLK 1 "" "")))
(use (match_operand:SI 2 "general_operand" ""))
Index: gcc/config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.424
diff -u -p -r1.424 mips.c
--- gcc/config/mips/mips.c 5 Jul 2004 06:37:07 -0000 1.424
+++ gcc/config/mips/mips.c 7 Jul 2004 06:17:22 -0000
@@ -3504,7 +3504,7 @@ mips_block_move_loop (rtx dest, rtx src,
mips_block_move_straight (dest, src, leftover);
}
\f
-/* Expand a movstrsi instruction. */
+/* Expand a movmemsi instruction. */
bool
mips_expand_block_move (rtx dest, rtx src, rtx length)
Index: gcc/config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.249
diff -u -p -r1.249 mips.md
--- gcc/config/mips/mips.md 4 Jul 2004 21:09:37 -0000 1.249
+++ gcc/config/mips/mips.md 7 Jul 2004 06:17:24 -0000
@@ -5174,7 +5174,7 @@ dsrl\t%3,%3,1\n\
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand")
(match_operand:BLK 1 "general_operand"))
(use (match_operand:SI 2 ""))
Index: gcc/config/ns32k/ns32k.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.c,v
retrieving revision 1.47
diff -u -p -r1.47 ns32k.c
--- gcc/config/ns32k/ns32k.c 7 Mar 2004 04:45:05 -0000 1.47
+++ gcc/config/ns32k/ns32k.c 7 Jul 2004 06:17:25 -0000
@@ -887,7 +887,7 @@ expand_block_move (rtx operands[])
dest = copy_addr_to_reg (XEXP (operands[0], 0));
src = copy_addr_to_reg (XEXP (operands[1], 0));
- emit_insn (gen_movstrsi2(dest, src, GEN_INT (words)));
+ emit_insn (gen_movmemsi2(dest, src, GEN_INT (words)));
}
}
move_tail (operands, bytes & 3, bytes & ~3);
@@ -914,7 +914,7 @@ expand_block_move (rtx operands[])
if (bytes >> 2)
{
emit_move_insn (count_reg, GEN_INT (bytes >> 2));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
}
/* insns to copy rest */
move_tail (operands, bytes & 3, 0);
@@ -923,7 +923,7 @@ expand_block_move (rtx operands[])
{
/* insns to copy by words */
emit_insn (gen_lshrsi3 (count_reg, bytes_rtx, const2_rtx));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
if (constp)
{
move_tail (operands, bytes & 3, 0);
@@ -932,7 +932,7 @@ expand_block_move (rtx operands[])
{
/* insns to copy rest */
emit_insn (gen_andsi3 (count_reg, bytes_rtx, GEN_INT (3)));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
}
}
else
@@ -958,17 +958,17 @@ expand_block_move (rtx operands[])
emit_insn (gen_negsi2 (count_reg, src_reg));
emit_insn (gen_andsi3 (count_reg, count_reg, GEN_INT (3)));
emit_insn (gen_subsi3 (bytes_reg, bytes_reg, count_reg));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
if (!constp)
emit_label (aligned_label);
/* insns to copy by words */
emit_insn (gen_lshrsi3 (count_reg, bytes_reg, const2_rtx));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
/* insns to copy rest */
emit_insn (gen_andsi3 (count_reg, bytes_reg, GEN_INT (3)));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
}
}
\f
Index: gcc/config/ns32k/ns32k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.h,v
retrieving revision 1.67
diff -u -p -r1.67 ns32k.h
--- gcc/config/ns32k/ns32k.h 11 Mar 2004 05:54:33 -0000 1.67
+++ gcc/config/ns32k/ns32k.h 7 Jul 2004 06:17:26 -0000
@@ -1104,7 +1104,7 @@ __transfer_from_trampoline () \
/* The number of scalar move insns which should be generated instead
of a string move insn or a library call.
- We have a smart movstrsi insn */
+ We have a smart movmemsi insn */
#define MOVE_RATIO 0
#define STORE_RATIO (optimize_size ? 3 : 15)
Index: gcc/config/ns32k/ns32k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.md,v
retrieving revision 1.30
diff -u -p -r1.30 ns32k.md
--- gcc/config/ns32k/ns32k.md 15 Mar 2004 18:20:49 -0000 1.30
+++ gcc/config/ns32k/ns32k.md 7 Jul 2004 06:17:27 -0000
@@ -543,10 +543,10 @@
;;
;; Strategy: Use define_expand to
;; either emit insns directly if it can be done simply or
-;; emit rtl to match movstrsi1 which has extra scratch registers
+;; emit rtl to match movmemsi1 which has extra scratch registers
;; which can be used to generate more complex code.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "general_operand" ""))
@@ -568,7 +568,7 @@
;; r3 match
-(define_insn "movstrsi1"
+(define_insn "movmemsi1"
[(set (mem:BLK (reg:SI 2))
(mem:BLK (reg:SI 1)))
(use (reg:SI 0))
@@ -585,7 +585,7 @@
return \"movsb\";
}")
-(define_insn "movstrsi2"
+(define_insn "movmemsi2"
[(set (mem:BLK (match_operand:SI 0 "address_operand" "p"))
(mem:BLK (match_operand:SI 1 "address_operand" "p")))
(use (match_operand 2 "immediate_operand" "i"))]
Index: gcc/config/pa/pa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v
retrieving revision 1.254
diff -u -p -r1.254 pa.c
--- gcc/config/pa/pa.c 6 Jul 2004 21:21:29 -0000 1.254
+++ gcc/config/pa/pa.c 7 Jul 2004 06:17:32 -0000
@@ -95,8 +95,8 @@ static int pa_can_combine_p (rtx, rtx, r
static int forward_branch_p (rtx);
static int shadd_constant_p (int);
static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *);
-static int compute_movstr_length (rtx);
-static int compute_clrstr_length (rtx);
+static int compute_movmem_length (rtx);
+static int compute_clrmem_length (rtx);
static bool pa_assemble_integer (rtx, unsigned int, int);
static void remove_useless_addtr_insns (int);
static void store_reg (int, HOST_WIDE_INT, int);
@@ -2802,7 +2802,7 @@ output_block_move (rtx *operands, int si
count insns rather than emit them. */
static int
-compute_movstr_length (rtx insn)
+compute_movmem_length (rtx insn)
{
rtx pat = PATTERN (insn);
unsigned int align = INTVAL (XEXP (XVECEXP (pat, 0, 7), 0));
@@ -2944,7 +2944,7 @@ output_block_clear (rtx *operands, int s
count insns rather than emit them. */
static int
-compute_clrstr_length (rtx insn)
+compute_clrmem_length (rtx insn)
{
rtx pat = PATTERN (insn);
unsigned int align = INTVAL (XEXP (XVECEXP (pat, 0, 4), 0));
@@ -4805,7 +4805,7 @@ pa_adjust_insn_length (rtx insn, int len
&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 1)) == MEM
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 1)) == BLKmode)
- return compute_movstr_length (insn) - 4;
+ return compute_movmem_length (insn) - 4;
/* Block clear pattern. */
else if (GET_CODE (insn) == INSN
&& GET_CODE (pat) == PARALLEL
@@ -4813,7 +4813,7 @@ pa_adjust_insn_length (rtx insn, int len
&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 0)) == MEM
&& XEXP (XVECEXP (pat, 0, 0), 1) == const0_rtx
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode)
- return compute_clrstr_length (insn) - 4;
+ return compute_clrmem_length (insn) - 4;
/* Conditional branch with an unfilled delay slot. */
else if (GET_CODE (insn) == JUMP_INSN && ! simplejump_p (insn))
{
Index: gcc/config/pa/pa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.md,v
retrieving revision 1.151
diff -u -p -r1.151 pa.md
--- gcc/config/pa/pa.md 5 Jul 2004 17:49:20 -0000 1.151
+++ gcc/config/pa/pa.md 7 Jul 2004 06:17:35 -0000
@@ -3140,9 +3140,9 @@
;; The definition of this insn does not really explain what it does,
;; but it should suffice that anything generated as this insn will be
-;; recognized as a movstrsi operation, and that it will not successfully
+;; recognized as a movmemsi operation, and that it will not successfully
;; combine with anything.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(clobber (match_dup 4))
@@ -3222,7 +3222,7 @@
;; operands 0 and 1 are both equivalent to symbolic MEMs. Thus, we are
;; forced to internally copy operands 0 and 1 to operands 7 and 8,
;; respectively. We then split or peephole optimize after reload.
-(define_insn "movstrsi_prereload"
+(define_insn "movmemsi_prereload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
(clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3315,7 +3315,7 @@
}
}")
-(define_insn "movstrsi_postreload"
+(define_insn "movmemsi_postreload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
(mem:BLK (match_operand:SI 1 "register_operand" "+r,r")))
(clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3330,7 +3330,7 @@
"* return output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(clobber (match_dup 4))
@@ -3410,7 +3410,7 @@
;; operands 0 and 1 are both equivalent to symbolic MEMs. Thus, we are
;; forced to internally copy operands 0 and 1 to operands 7 and 8,
;; respectively. We then split or peephole optimize after reload.
-(define_insn "movstrdi_prereload"
+(define_insn "movmemdi_prereload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
(mem:BLK (match_operand:DI 1 "register_operand" "r,r")))
(clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3503,7 +3503,7 @@
}
}")
-(define_insn "movstrdi_postreload"
+(define_insn "movmemdi_postreload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
(mem:BLK (match_operand:DI 1 "register_operand" "+r,r")))
(clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3518,7 +3518,7 @@
"* return output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(clobber (match_dup 3))
@@ -3554,7 +3554,7 @@
operands[4] = gen_reg_rtx (SImode);
}")
-(define_insn "clrstrsi_prereload"
+(define_insn "clrmemsi_prereload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
(const_int 0))
(clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3616,7 +3616,7 @@
}
}")
-(define_insn "clrstrsi_postreload"
+(define_insn "clrmemsi_postreload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
(const_int 0))
(clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3628,7 +3628,7 @@
"* return output_block_clear (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(clobber (match_dup 3))
@@ -3664,7 +3664,7 @@
operands[4] = gen_reg_rtx (DImode);
}")
-(define_insn "clrstrdi_prereload"
+(define_insn "clrmemdi_prereload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
(const_int 0))
(clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3726,7 +3726,7 @@
}
}")
-(define_insn "clrstrdi_postreload"
+(define_insn "clrmemdi_postreload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
(const_int 0))
(clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
Index: gcc/config/pdp11/pdp11.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pdp11/pdp11.h,v
retrieving revision 1.60
diff -u -p -r1.60 pdp11.h
--- gcc/config/pdp11/pdp11.h 11 Mar 2004 05:54:34 -0000 1.60
+++ gcc/config/pdp11/pdp11.h 7 Jul 2004 06:17:37 -0000
@@ -71,7 +71,7 @@ extern int target_flags;
{ "no-45", -8, "" }, \
/* is 11/10 */ \
{ "10", -12, N_("Generate code for an 11/10") }, \
-/* use movstrhi for bcopy */ \
+/* use movmemhi for bcopy */ \
{ "bcopy", 16, NULL }, \
{ "bcopy-builtin", -16, NULL }, \
/* use 32 bit for int */ \
Index: gcc/config/pdp11/pdp11.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pdp11/pdp11.md,v
retrieving revision 1.21
diff -u -p -r1.21 pdp11.md
--- gcc/config/pdp11/pdp11.md 27 Sep 2003 04:48:27 -0000 1.21
+++ gcc/config/pdp11/pdp11.md 7 Jul 2004 06:17:37 -0000
@@ -688,7 +688,7 @@
;; maybe fiddle a bit with move_ratio, then
;; let constraints only accept a register ...
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "=g,g")
(match_operand:BLK 1 "general_operand" "g,g"))
(use (match_operand:HI 2 "arith_operand" "n,&mr"))
@@ -712,7 +712,7 @@
}")
-(define_insn "" ; "movstrhi"
+(define_insn "" ; "movmemhi"
[(set (mem:BLK (match_operand:HI 0 "general_operand" "=r,r"))
(mem:BLK (match_operand:HI 1 "general_operand" "r,r")))
(use (match_operand:HI 2 "arith_operand" "n,&r"))
Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.660
diff -u -p -r1.660 rs6000.c
--- gcc/config/rs6000/rs6000.c 2 Jul 2004 18:00:46 -0000 1.660
+++ gcc/config/rs6000/rs6000.c 7 Jul 2004 06:17:46 -0000
@@ -8216,7 +8216,7 @@ expand_block_move (rtx operands[])
for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes)
{
union {
- rtx (*movstrsi) (rtx, rtx, rtx, rtx);
+ rtx (*movmemsi) (rtx, rtx, rtx, rtx);
rtx (*mov) (rtx, rtx);
} gen_func;
enum machine_mode mode = BLKmode;
@@ -8234,7 +8234,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[12])
{
move_bytes = (bytes > 32) ? 32 : bytes;
- gen_func.movstrsi = gen_movstrsi_8reg;
+ gen_func.movmemsi = gen_movmemsi_8reg;
}
else if (TARGET_STRING
&& bytes > 16 /* move up to 24 bytes at a time */
@@ -8246,7 +8246,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[10])
{
move_bytes = (bytes > 24) ? 24 : bytes;
- gen_func.movstrsi = gen_movstrsi_6reg;
+ gen_func.movmemsi = gen_movmemsi_6reg;
}
else if (TARGET_STRING
&& bytes > 8 /* move up to 16 bytes at a time */
@@ -8256,7 +8256,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[8])
{
move_bytes = (bytes > 16) ? 16 : bytes;
- gen_func.movstrsi = gen_movstrsi_4reg;
+ gen_func.movmemsi = gen_movmemsi_4reg;
}
else if (bytes >= 8 && TARGET_POWERPC64
/* 64-bit loads and stores require word-aligned
@@ -8270,7 +8270,7 @@ expand_block_move (rtx operands[])
else if (TARGET_STRING && bytes > 4 && !TARGET_POWERPC64)
{ /* move up to 8 bytes at a time */
move_bytes = (bytes > 8) ? 8 : bytes;
- gen_func.movstrsi = gen_movstrsi_2reg;
+ gen_func.movmemsi = gen_movmemsi_2reg;
}
else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
{ /* move 4 bytes */
@@ -8287,7 +8287,7 @@ expand_block_move (rtx operands[])
else if (TARGET_STRING && bytes > 1)
{ /* move up to 4 bytes at a time */
move_bytes = (bytes > 4) ? 4 : bytes;
- gen_func.movstrsi = gen_movstrsi_1reg;
+ gen_func.movmemsi = gen_movmemsi_1reg;
}
else /* move 1 byte at a time */
{
@@ -8317,7 +8317,7 @@ expand_block_move (rtx operands[])
if (mode == BLKmode)
{
- /* Move the address into scratch registers. The movstrsi
+ /* Move the address into scratch registers. The movmemsi
patterns require zero offset. */
if (!REG_P (XEXP (src, 0)))
{
@@ -8333,7 +8333,7 @@ expand_block_move (rtx operands[])
}
set_mem_size (dest, GEN_INT (move_bytes));
- emit_insn ((*gen_func.movstrsi) (dest, src,
+ emit_insn ((*gen_func.movmemsi) (dest, src,
GEN_INT (move_bytes & 31),
align_rtx));
}
Index: gcc/config/rs6000/rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.309
diff -u -p -r1.309 rs6000.md
--- gcc/config/rs6000/rs6000.md 25 Jun 2004 00:59:35 -0000 1.309
+++ gcc/config/rs6000/rs6000.md 7 Jul 2004 06:17:50 -0000
@@ -9116,7 +9116,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "" ""))
@@ -9133,7 +9133,7 @@
;; Move up to 32 bytes at a time. The fixed registers are needed because the
;; register allocator doesn't have a clue about allocating 8 word registers.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_8reg"
+(define_expand "movmemsi_8reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9225,7 +9225,7 @@
;; Move up to 24 bytes at a time. The fixed registers are needed because the
;; register allocator doesn't have a clue about allocating 6 word registers.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_6reg"
+(define_expand "movmemsi_6reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9306,7 +9306,7 @@
;; Move up to 16 bytes at a time, using 4 fixed registers to avoid spill
;; problems with TImode.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_4reg"
+(define_expand "movmemsi_4reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9377,7 +9377,7 @@
(set_attr "length" "8")])
;; Move up to 8 bytes at a time.
-(define_expand "movstrsi_2reg"
+(define_expand "movmemsi_2reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9414,7 +9414,7 @@
(set_attr "length" "8")])
;; Move up to 4 bytes at a time.
-(define_expand "movstrsi_1reg"
+(define_expand "movmemsi_1reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
Index: gcc/config/s390/s390-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390-protos.h,v
retrieving revision 1.50
diff -u -p -r1.50 s390-protos.h
--- gcc/config/s390/s390-protos.h 27 Jun 2004 15:31:52 -0000 1.50
+++ gcc/config/s390/s390-protos.h 7 Jul 2004 06:17:51 -0000
@@ -74,8 +74,8 @@ extern int s390_plus_operand (rtx, enum
extern void s390_expand_plus_operand (rtx, rtx, rtx);
extern void emit_symbolic_move (rtx *);
extern void s390_load_address (rtx, rtx);
-extern void s390_expand_movstr (rtx, rtx, rtx);
-extern void s390_expand_clrstr (rtx, rtx);
+extern void s390_expand_movmem (rtx, rtx, rtx);
+extern void s390_expand_clrmem (rtx, rtx);
extern void s390_expand_cmpmem (rtx, rtx, rtx, rtx);
extern bool s390_expand_addcc (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
extern rtx s390_return_addr_rtx (int, rtx);
Index: gcc/config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.155
diff -u -p -r1.155 s390.c
--- gcc/config/s390/s390.c 4 Jul 2004 08:07:09 -0000 1.155
+++ gcc/config/s390/s390.c 7 Jul 2004 06:17:54 -0000
@@ -3029,17 +3029,17 @@ legitimize_address (register rtx x, regi
/* Emit code to move LEN bytes from DST to SRC. */
void
-s390_expand_movstr (rtx dst, rtx src, rtx len)
+s390_expand_movmem (rtx dst, rtx src, rtx len)
{
if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
{
if (INTVAL (len) > 0)
- emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
+ emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
}
else if (TARGET_MVCLE)
{
- emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
+ emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
}
else
@@ -3081,7 +3081,7 @@ s390_expand_movstr (rtx dst, rtx src, rt
emit_label (loop_start_label);
- emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
+ emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
s390_load_address (dst_addr,
gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
s390_load_address (src_addr,
@@ -3097,7 +3097,7 @@ s390_expand_movstr (rtx dst, rtx src, rt
emit_jump (loop_start_label);
emit_label (loop_end_label);
- emit_insn (gen_movstr_short (dst, src,
+ emit_insn (gen_movmem_short (dst, src,
convert_to_mode (Pmode, count, 1)));
emit_label (end_label);
}
@@ -3106,17 +3106,17 @@ s390_expand_movstr (rtx dst, rtx src, rt
/* Emit code to clear LEN bytes at DST. */
void
-s390_expand_clrstr (rtx dst, rtx len)
+s390_expand_clrmem (rtx dst, rtx len)
{
if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
{
if (INTVAL (len) > 0)
- emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
+ emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
}
else if (TARGET_MVCLE)
{
- emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
+ emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
}
else
@@ -3156,7 +3156,7 @@ s390_expand_clrstr (rtx dst, rtx len)
emit_label (loop_start_label);
- emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
+ emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
s390_load_address (dst_addr,
gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
@@ -3170,7 +3170,7 @@ s390_expand_clrstr (rtx dst, rtx len)
emit_jump (loop_start_label);
emit_label (loop_end_label);
- emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
+ emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
emit_label (end_label);
}
}
Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.115
diff -u -p -r1.115 s390.md
--- gcc/config/s390/s390.md 4 Jul 2004 08:07:10 -0000 1.115
+++ gcc/config/s390/s390.md 7 Jul 2004 06:17:56 -0000
@@ -1873,29 +1873,29 @@
(set_attr "length" "8")])
;
-; movstrM instruction pattern(s).
+; movmemM instruction pattern(s).
;
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "general_operand" ""))
(match_operand 3 "" "")]
"TARGET_64BIT"
- "s390_expand_movstr (operands[0], operands[1], operands[2]); DONE;")
+ "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "general_operand" ""))
(match_operand 3 "" "")]
""
- "s390_expand_movstr (operands[0], operands[1], operands[2]); DONE;")
+ "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
; Move a block that is up to 256 bytes in length.
; The block length is taken as (operands[2] % 256) + 1.
-(define_expand "movstr_short"
+(define_expand "movmem_short"
[(parallel
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
@@ -1904,7 +1904,7 @@
""
"operands[3] = gen_rtx_SCRATCH (Pmode);")
-(define_insn "*movstr_short"
+(define_insn "*movmem_short"
[(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
(match_operand:BLK 1 "memory_operand" "Q,Q"))
(use (match_operand 2 "nonmemory_operand" "n,a"))
@@ -1933,7 +1933,7 @@
; Move a block of arbitrary length.
-(define_expand "movstr_long"
+(define_expand "movmem_long"
[(parallel
[(clobber (match_dup 2))
(clobber (match_dup 3))
@@ -1966,7 +1966,7 @@
operands[3] = reg1;
})
-(define_insn "*movstr_long_64"
+(define_insn "*movmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
@@ -1980,7 +1980,7 @@
(set_attr "type" "vs")
(set_attr "length" "8")])
-(define_insn "*movstr_long_31"
+(define_insn "*movmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(clobber (match_operand:DI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
@@ -1995,29 +1995,29 @@
(set_attr "length" "8")])
;
-; clrstrM instruction pattern(s).
+; clrmemM instruction pattern(s).
;
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "general_operand" ""))
(match_operand 2 "" "")]
"TARGET_64BIT"
- "s390_expand_clrstr (operands[0], operands[1]); DONE;")
+ "s390_expand_clrmem (operands[0], operands[1]); DONE;")
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:SI 1 "general_operand" ""))
(match_operand 2 "" "")]
""
- "s390_expand_clrstr (operands[0], operands[1]); DONE;")
+ "s390_expand_clrmem (operands[0], operands[1]); DONE;")
; Clear a block that is up to 256 bytes in length.
; The block length is taken as (operands[1] % 256) + 1.
-(define_expand "clrstr_short"
+(define_expand "clrmem_short"
[(parallel
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
@@ -2027,7 +2027,7 @@
""
"operands[2] = gen_rtx_SCRATCH (Pmode);")
-(define_insn "*clrstr_short"
+(define_insn "*clrmem_short"
[(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
(const_int 0))
(use (match_operand 1 "nonmemory_operand" "n,a"))
@@ -2057,7 +2057,7 @@
; Clear a block of arbitrary length.
-(define_expand "clrstr_long"
+(define_expand "clrmem_long"
[(parallel
[(clobber (match_dup 1))
(set (match_operand:BLK 0 "memory_operand" "")
@@ -2084,7 +2084,7 @@
operands[2] = reg1;
})
-(define_insn "*clrstr_long_64"
+(define_insn "*clrmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(const_int 0))
@@ -2097,7 +2097,7 @@
(set_attr "type" "vs")
(set_attr "length" "8")])
-(define_insn "*clrstr_long_31"
+(define_insn "*clrmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(const_int 0))
Index: gcc/config/sh/lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/lib1funcs.asm,v
retrieving revision 1.36
diff -u -p -r1.36 lib1funcs.asm
--- gcc/config/sh/lib1funcs.asm 12 Aug 2003 01:25:07 -0000 1.36
+++ gcc/config/sh/lib1funcs.asm 7 Jul 2004 06:17:57 -0000
@@ -710,128 +710,128 @@ LOCAL(lshrsi3_0):
ENDFUNC(GLOBAL(lshrsi3))
#endif
-#ifdef L_movstr
+#ifdef L_movmem
.text
! done all the large groups, do the remainder
-! jump to movstr+
+! jump to movmem+
done:
add #64,r5
- mova GLOBAL(movstrSI0),r0
+ mova GLOBAL(movmemSI0),r0
shll2 r6
add r6,r0
jmp @r0
add #64,r4
.align 4
- .global GLOBAL(movstrSI64)
- FUNC(GLOBAL(movstrSI64))
-GLOBAL(movstrSI64):
+ .global GLOBAL(movmemSI64)
+ FUNC(GLOBAL(movmemSI64))
+GLOBAL(movmemSI64):
mov.l @(60,r5),r0
mov.l r0,@(60,r4)
- .global GLOBAL(movstrSI60)
- FUNC(GLOBAL(movstrSI60))
-GLOBAL(movstrSI60):
+ .global GLOBAL(movmemSI60)
+ FUNC(GLOBAL(movmemSI60))
+GLOBAL(movmemSI60):
mov.l @(56,r5),r0
mov.l r0,@(56,r4)
- .global GLOBAL(movstrSI56)
- FUNC(GLOBAL(movstrSI56))
-GLOBAL(movstrSI56):
+ .global GLOBAL(movmemSI56)
+ FUNC(GLOBAL(movmemSI56))
+GLOBAL(movmemSI56):
mov.l @(52,r5),r0
mov.l r0,@(52,r4)
- .global GLOBAL(movstrSI52)
- FUNC(GLOBAL(movstrSI52))
-GLOBAL(movstrSI52):
+ .global GLOBAL(movmemSI52)
+ FUNC(GLOBAL(movmemSI52))
+GLOBAL(movmemSI52):
mov.l @(48,r5),r0
mov.l r0,@(48,r4)
- .global GLOBAL(movstrSI48)
- FUNC(GLOBAL(movstrSI48))
-GLOBAL(movstrSI48):
+ .global GLOBAL(movmemSI48)
+ FUNC(GLOBAL(movmemSI48))
+GLOBAL(movmemSI48):
mov.l @(44,r5),r0
mov.l r0,@(44,r4)
- .global GLOBAL(movstrSI44)
- FUNC(GLOBAL(movstrSI44))
-GLOBAL(movstrSI44):
+ .global GLOBAL(movmemSI44)
+ FUNC(GLOBAL(movmemSI44))
+GLOBAL(movmemSI44):
mov.l @(40,r5),r0
mov.l r0,@(40,r4)
- .global GLOBAL(movstrSI40)
- FUNC(GLOBAL(movstrSI40))
-GLOBAL(movstrSI40):
+ .global GLOBAL(movmemSI40)
+ FUNC(GLOBAL(movmemSI40))
+GLOBAL(movmemSI40):
mov.l @(36,r5),r0
mov.l r0,@(36,r4)
- .global GLOBAL(movstrSI36)
- FUNC(GLOBAL(movstrSI36))
-GLOBAL(movstrSI36):
+ .global GLOBAL(movmemSI36)
+ FUNC(GLOBAL(movmemSI36))
+GLOBAL(movmemSI36):
mov.l @(32,r5),r0
mov.l r0,@(32,r4)
- .global GLOBAL(movstrSI32)
- FUNC(GLOBAL(movstrSI32))
-GLOBAL(movstrSI32):
+ .global GLOBAL(movmemSI32)
+ FUNC(GLOBAL(movmemSI32))
+GLOBAL(movmemSI32):
mov.l @(28,r5),r0
mov.l r0,@(28,r4)
- .global GLOBAL(movstrSI28)
- FUNC(GLOBAL(movstrSI28))
-GLOBAL(movstrSI28):
+ .global GLOBAL(movmemSI28)
+ FUNC(GLOBAL(movmemSI28))
+GLOBAL(movmemSI28):
mov.l @(24,r5),r0
mov.l r0,@(24,r4)
- .global GLOBAL(movstrSI24)
- FUNC(GLOBAL(movstrSI24))
-GLOBAL(movstrSI24):
+ .global GLOBAL(movmemSI24)
+ FUNC(GLOBAL(movmemSI24))
+GLOBAL(movmemSI24):
mov.l @(20,r5),r0
mov.l r0,@(20,r4)
- .global GLOBAL(movstrSI20)
- FUNC(GLOBAL(movstrSI20))
-GLOBAL(movstrSI20):
+ .global GLOBAL(movmemSI20)
+ FUNC(GLOBAL(movmemSI20))
+GLOBAL(movmemSI20):
mov.l @(16,r5),r0
mov.l r0,@(16,r4)
- .global GLOBAL(movstrSI16)
- FUNC(GLOBAL(movstrSI16))
-GLOBAL(movstrSI16):
+ .global GLOBAL(movmemSI16)
+ FUNC(GLOBAL(movmemSI16))
+GLOBAL(movmemSI16):
mov.l @(12,r5),r0
mov.l r0,@(12,r4)
- .global GLOBAL(movstrSI12)
- FUNC(GLOBAL(movstrSI12))
-GLOBAL(movstrSI12):
+ .global GLOBAL(movmemSI12)
+ FUNC(GLOBAL(movmemSI12))
+GLOBAL(movmemSI12):
mov.l @(8,r5),r0
mov.l r0,@(8,r4)
- .global GLOBAL(movstrSI8)
- FUNC(GLOBAL(movstrSI8))
-GLOBAL(movstrSI8):
+ .global GLOBAL(movmemSI8)
+ FUNC(GLOBAL(movmemSI8))
+GLOBAL(movmemSI8):
mov.l @(4,r5),r0
mov.l r0,@(4,r4)
- .global GLOBAL(movstrSI4)
- FUNC(GLOBAL(movstrSI4))
-GLOBAL(movstrSI4):
+ .global GLOBAL(movmemSI4)
+ FUNC(GLOBAL(movmemSI4))
+GLOBAL(movmemSI4):
mov.l @(0,r5),r0
mov.l r0,@(0,r4)
- .global GLOBAL(movstrSI0)
- FUNC(GLOBAL(movstrSI0))
-GLOBAL(movstrSI0):
+ .global GLOBAL(movmemSI0)
+ FUNC(GLOBAL(movmemSI0))
+GLOBAL(movmemSI0):
rts
nop
- ENDFUNC(GLOBAL(movstrSI64))
- ENDFUNC(GLOBAL(movstrSI60))
- ENDFUNC(GLOBAL(movstrSI56))
- ENDFUNC(GLOBAL(movstrSI52))
- ENDFUNC(GLOBAL(movstrSI48))
- ENDFUNC(GLOBAL(movstrSI44))
- ENDFUNC(GLOBAL(movstrSI40))
- ENDFUNC(GLOBAL(movstrSI36))
- ENDFUNC(GLOBAL(movstrSI32))
- ENDFUNC(GLOBAL(movstrSI28))
- ENDFUNC(GLOBAL(movstrSI24))
- ENDFUNC(GLOBAL(movstrSI20))
- ENDFUNC(GLOBAL(movstrSI16))
- ENDFUNC(GLOBAL(movstrSI12))
- ENDFUNC(GLOBAL(movstrSI8))
- ENDFUNC(GLOBAL(movstrSI4))
- ENDFUNC(GLOBAL(movstrSI0))
+ ENDFUNC(GLOBAL(movmemSI64))
+ ENDFUNC(GLOBAL(movmemSI60))
+ ENDFUNC(GLOBAL(movmemSI56))
+ ENDFUNC(GLOBAL(movmemSI52))
+ ENDFUNC(GLOBAL(movmemSI48))
+ ENDFUNC(GLOBAL(movmemSI44))
+ ENDFUNC(GLOBAL(movmemSI40))
+ ENDFUNC(GLOBAL(movmemSI36))
+ ENDFUNC(GLOBAL(movmemSI32))
+ ENDFUNC(GLOBAL(movmemSI28))
+ ENDFUNC(GLOBAL(movmemSI24))
+ ENDFUNC(GLOBAL(movmemSI20))
+ ENDFUNC(GLOBAL(movmemSI16))
+ ENDFUNC(GLOBAL(movmemSI12))
+ ENDFUNC(GLOBAL(movmemSI8))
+ ENDFUNC(GLOBAL(movmemSI4))
+ ENDFUNC(GLOBAL(movmemSI0))
.align 4
- .global GLOBAL(movstr)
- FUNC(GLOBAL(movstr))
-GLOBAL(movstr):
+ .global GLOBAL(movmem)
+ FUNC(GLOBAL(movmem))
+GLOBAL(movmem):
mov.l @(60,r5),r0
mov.l r0,@(60,r4)
@@ -885,36 +885,36 @@ GLOBAL(movstr):
bf done
add #64,r5
- bra GLOBAL(movstr)
+ bra GLOBAL(movmem)
add #64,r4
- FUNC(GLOBAL(movstr))
+ FUNC(GLOBAL(movmem))
#endif
-#ifdef L_movstr_i4
+#ifdef L_movmem_i4
.text
- .global GLOBAL(movstr_i4_even)
- .global GLOBAL(movstr_i4_odd)
- .global GLOBAL(movstrSI12_i4)
-
- FUNC(GLOBAL(movstr_i4_even))
- FUNC(GLOBAL(movstr_i4_odd))
- FUNC(GLOBAL(movstrSI12_i4))
+ .global GLOBAL(movmem_i4_even)
+ .global GLOBAL(movmem_i4_odd)
+ .global GLOBAL(movmemSI12_i4)
+
+ FUNC(GLOBAL(movmem_i4_even))
+ FUNC(GLOBAL(movmem_i4_odd))
+ FUNC(GLOBAL(movmemSI12_i4))
.p2align 5
-L_movstr_2mod4_end:
+L_movmem_2mod4_end:
mov.l r0,@(16,r4)
rts
mov.l r1,@(20,r4)
.p2align 2
-GLOBAL(movstr_i4_even):
+GLOBAL(movmem_i4_even):
mov.l @r5+,r0
- bra L_movstr_start_even
+ bra L_movmem_start_even
mov.l @r5+,r1
-GLOBAL(movstr_i4_odd):
+GLOBAL(movmem_i4_odd):
mov.l @r5+,r1
add #-4,r4
mov.l @r5+,r2
@@ -922,29 +922,29 @@ GLOBAL(movstr_i4_odd):
mov.l r1,@(4,r4)
mov.l r2,@(8,r4)
-L_movstr_loop:
+L_movmem_loop:
mov.l r3,@(12,r4)
dt r6
mov.l @r5+,r0
- bt/s L_movstr_2mod4_end
+ bt/s L_movmem_2mod4_end
mov.l @r5+,r1
add #16,r4
-L_movstr_start_even:
+L_movmem_start_even:
mov.l @r5+,r2
mov.l @r5+,r3
mov.l r0,@r4
dt r6
mov.l r1,@(4,r4)
- bf/s L_movstr_loop
+ bf/s L_movmem_loop
mov.l r2,@(8,r4)
rts
mov.l r3,@(12,r4)
- ENDFUNC(GLOBAL(movstr_i4_even))
- ENDFUNC(GLOBAL(movstr_i4_odd))
+ ENDFUNC(GLOBAL(movmem_i4_even))
+ ENDFUNC(GLOBAL(movmem_i4_odd))
.p2align 4
-GLOBAL(movstrSI12_i4):
+GLOBAL(movmemSI12_i4):
mov.l @r5,r0
mov.l @(4,r5),r1
mov.l @(8,r5),r2
@@ -953,7 +953,7 @@ GLOBAL(movstrSI12_i4):
rts
mov.l r2,@(8,r4)
- ENDFUNC(GLOBAL(movstrSI12_i4))
+ ENDFUNC(GLOBAL(movmemSI12_i4))
#endif
#ifdef L_mulsi3
Index: gcc/config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.275
diff -u -p -r1.275 sh.c
--- gcc/config/sh/sh.c 3 Jul 2004 11:56:43 -0000 1.275
+++ gcc/config/sh/sh.c 7 Jul 2004 06:18:03 -0000
@@ -771,7 +771,7 @@ expand_block_move (rtx *operands)
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
- entry_name = get_identifier ("__movstrSI12_i4");
+ entry_name = get_identifier ("__movmemSI12_i4");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
@@ -791,8 +791,8 @@ expand_block_move (rtx *operands)
rtx r6 = gen_rtx_REG (SImode, 6);
entry_name = get_identifier (bytes & 4
- ? "__movstr_i4_odd"
- : "__movstr_i4_even");
+ ? "__movmem_i4_odd"
+ : "__movmem_i4_even");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
force_into (XEXP (operands[0], 0), r4);
@@ -815,7 +815,7 @@ expand_block_move (rtx *operands)
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
- sprintf (entry, "__movstrSI%d", bytes);
+ sprintf (entry, "__movmemSI%d", bytes);
entry_name = get_identifier (entry);
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
@@ -837,7 +837,7 @@ expand_block_move (rtx *operands)
rtx r5 = gen_rtx_REG (SImode, 5);
rtx r6 = gen_rtx_REG (SImode, 6);
- entry_name = get_identifier ("__movstr");
+ entry_name = get_identifier ("__movmem");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
force_into (XEXP (operands[0], 0), r4);
Index: gcc/config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.174
diff -u -p -r1.174 sh.md
--- gcc/config/sh/sh.md 3 Jul 2004 11:56:43 -0000 1.174
+++ gcc/config/sh/sh.md 7 Jul 2004 06:18:07 -0000
@@ -8088,7 +8088,7 @@ mov.l\\t1f,r0\\n\\
;; String/block move insn.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "" ""))
(mem:BLK (match_operand:BLK 1 "" "")))
(use (match_operand:SI 2 "nonmemory_operand" ""))
Index: gcc/config/sh/t-sh
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/t-sh,v
retrieving revision 1.17
diff -u -p -r1.17 t-sh
--- gcc/config/sh/t-sh 21 Jun 2004 18:18:40 -0000 1.17
+++ gcc/config/sh/t-sh 7 Jul 2004 06:18:07 -0000
@@ -1,6 +1,6 @@
LIB1ASMSRC = sh/lib1funcs.asm
-LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movstr \
- _movstr_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
+LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movmem \
+ _movmem_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
$(LIB1ASMFUNCS_CACHE)
# We want fine grained libraries, so use the new code to build the
Index: gcc/config/sparc/sparc.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sparc/sparc.h,v
retrieving revision 1.259
diff -u -p -r1.259 sparc.h
--- gcc/config/sparc/sparc.h 5 Jul 2004 19:49:18 -0000 1.259
+++ gcc/config/sparc/sparc.h 7 Jul 2004 06:18:10 -0000
@@ -2176,7 +2176,7 @@ do {
#define MOVE_MAX 8
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead. */
+ move-instruction pairs, we will do a movmem or libcall instead. */
#define MOVE_RATIO (optimize_size ? 3 : 8)
Index: gcc/config/vax/vax.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/vax/vax.md,v
retrieving revision 1.25
diff -u -p -r1.25 vax.md
--- gcc/config/vax/vax.md 1 Jul 2003 01:15:07 -0000 1.25
+++ gcc/config/vax/vax.md 7 Jul 2004 06:18:11 -0000
@@ -298,15 +298,15 @@
}")
;; This is here to accept 4 arguments and pass the first 3 along
-;; to the movstrhi1 pattern that really does the work.
-(define_expand "movstrhi"
+;; to the movmemhi1 pattern that really does the work.
+(define_expand "movmemhi"
[(set (match_operand:BLK 0 "general_operand" "=g")
(match_operand:BLK 1 "general_operand" "g"))
(use (match_operand:HI 2 "general_operand" "g"))
(match_operand 3 "" "")]
""
"
- emit_insn (gen_movstrhi1 (operands[0], operands[1], operands[2]));
+ emit_insn (gen_movmemhi1 (operands[0], operands[1], operands[2]));
DONE;
")
@@ -314,7 +314,7 @@
;; but it should suffice
;; that anything generated as this insn will be recognized as one
;; and that it won't successfully combine with anything.
-(define_insn "movstrhi1"
+(define_insn "movmemhi1"
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:BLK 1 "memory_operand" "m"))
(use (match_operand:HI 2 "general_operand" "g"))
Index: gcc/config/xtensa/xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.59
diff -u -p -r1.59 xtensa.c
--- gcc/config/xtensa/xtensa.c 22 Jun 2004 03:06:55 -0000 1.59
+++ gcc/config/xtensa/xtensa.c 7 Jul 2004 06:18:12 -0000
@@ -1464,7 +1464,7 @@ xtensa_expand_block_move (rtx *operands)
operands[0] = validize_mem (dest);
operands[1] = validize_mem (src);
- emit_insn (gen_movstrsi_internal (operands[0], operands[1],
+ emit_insn (gen_movmemsi_internal (operands[0], operands[1],
operands[2], operands[3]));
return 1;
}
Index: gcc/config/xtensa/xtensa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.md,v
retrieving revision 1.20
diff -u -p -r1.20 xtensa.md
--- gcc/config/xtensa/xtensa.md 18 Jun 2004 19:38:27 -0000 1.20
+++ gcc/config/xtensa/xtensa.md 7 Jul 2004 06:18:13 -0000
@@ -1057,7 +1057,7 @@
;; Block moves
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "arith_operand" ""))
@@ -1069,7 +1069,7 @@
DONE;
})
-(define_insn "movstrsi_internal"
+(define_insn "movmemsi_internal"
[(set (match_operand:BLK 0 "memory_operand" "=U")
(match_operand:BLK 1 "memory_operand" "U"))
(use (match_operand:SI 2 "arith_operand" ""))
Index: gcc/doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.479
diff -u -p -r1.479 invoke.texi
--- gcc/doc/invoke.texi 5 Jul 2004 19:49:20 -0000 1.479
+++ gcc/doc/invoke.texi 7 Jul 2004 06:18:23 -0000
@@ -9603,12 +9603,12 @@ Generate code for a PDP-11/10.
@item -mbcopy-builtin
@opindex bcopy-builtin
-Use inline @code{movstrhi} patterns for copying memory. This is the
+Use inline @code{movmemhi} patterns for copying memory. This is the
default.
@item -mbcopy
@opindex mbcopy
-Do not use inline @code{movstrhi} patterns for copying memory.
+Do not use inline @code{movmemhi} patterns for copying memory.
@item -mint16
@itemx -mno-int32
Index: gcc/doc/md.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/md.texi,v
retrieving revision 1.102
diff -u -p -r1.102 md.texi
--- gcc/doc/md.texi 2 Jul 2004 23:57:12 -0000 1.102
+++ gcc/doc/md.texi 7 Jul 2004 06:18:29 -0000
@@ -2776,8 +2776,8 @@ not use @code{(cc0)}. Doing so would co
would no longer be clear which @code{set} operations were comparisons.
The @samp{cmp@var{m}} patterns should be used instead.
-@cindex @code{movstr@var{m}} instruction pattern
-@item @samp{movstr@var{m}}
+@cindex @code{movmem@var{m}} instruction pattern
+@item @samp{movmem@var{m}}
Block move instruction. The addresses of the destination and source
strings are the first two operands, and both are in mode @code{Pmode}.
@@ -2794,20 +2794,20 @@ destination, in the form of a @code{cons
compiler knows that both source and destination are word-aligned,
it may provide the value 4 for this operand.
-Descriptions of multiple @code{movstr@var{m}} patterns can only be
+Descriptions of multiple @code{movmem@var{m}} patterns can only be
beneficial if the patterns for smaller modes have fewer restrictions
on their first, second and fourth operands. Note that the mode @var{m}
-in @code{movstr@var{m}} does not impose any restriction on the mode of
+in @code{movmem@var{m}} does not impose any restriction on the mode of
individually moved data units in the block.
These patterns need not give special consideration to the possibility
that the source and destination strings might overlap.
-@cindex @code{clrstr@var{m}} instruction pattern
-@item @samp{clrstr@var{m}}
+@cindex @code{clrmem@var{m}} instruction pattern
+@item @samp{clrmem@var{m}}
Block clear instruction. The addresses of the destination string is the
first operand, in mode @code{Pmode}. The number of bytes to clear is
-the second operand, in mode @var{m}. See @samp{movstr@var{m}} for
+the second operand, in mode @var{m}. See @samp{movmem@var{m}} for
a discussion of the choice of mode.
The third operand is the known alignment of the destination, in the form
@@ -2815,13 +2815,13 @@ of a @code{const_int} rtx. Thus, if the
destination is word-aligned, it may provide the value 4 for this
operand.
-The use for multiple @code{clrstr@var{m}} is as for @code{movstr@var{m}}.
+The use for multiple @code{clrmem@var{m}} is as for @code{movmem@var{m}}.
@cindex @code{cmpstr@var{m}} instruction pattern
@item @samp{cmpstr@var{m}}
String compare instruction, with five operands. Operand 0 is the output;
it has mode @var{m}. The remaining four operands are like the operands
-of @samp{movstr@var{m}}. The two memory blocks specified are compared
+of @samp{movmem@var{m}}. The two memory blocks specified are compared
byte by byte in lexicographic order starting at the beginning of each
string. The instruction is not allowed to prefetch more than one byte
at a time since either string may end in the first byte and reading past
Index: gcc/doc/rtl.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/rtl.texi,v
retrieving revision 1.67
diff -u -p -r1.67 rtl.texi
--- gcc/doc/rtl.texi 13 May 2004 06:40:27 -0000 1.67
+++ gcc/doc/rtl.texi 7 Jul 2004 06:18:32 -0000
@@ -2550,7 +2550,7 @@ that the register is live. You should t
instead. The @code{use} RTX is most commonly useful to describe that
a fixed register is implicitly used in an insn. It is also safe to use
in patterns where the compiler knows for other reasons that the result
-of the whole pattern is variable, such as @samp{movstr@var{m}} or
+of the whole pattern is variable, such as @samp{movmem@var{m}} or
@samp{call} patterns.
During the reload phase, an insn that has a @code{use} as pattern
Index: gcc/po/be.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/be.po,v
retrieving revision 1.4
diff -u -p -r1.4 be.po
--- gcc/po/be.po 15 May 2004 19:13:01 -0000 1.4
+++ gcc/po/be.po 7 Jul 2004 06:18:41 -0000
@@ -11589,7 +11589,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/ca.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/ca.po,v
retrieving revision 1.2
diff -u -p -r1.2 ca.po
--- gcc/po/ca.po 15 May 2004 19:13:01 -0000 1.2
+++ gcc/po/ca.po 7 Jul 2004 06:18:53 -0000
@@ -11735,7 +11735,7 @@ msgstr "5Generar codi per a un 11/45"
msgid "Generate code for an 11/10"
msgstr "Generar codi per a un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/da.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/da.po,v
retrieving revision 1.5
diff -u -p -r1.5 da.po
--- gcc/po/da.po 15 May 2004 19:13:02 -0000 1.5
+++ gcc/po/da.po 7 Jul 2004 06:19:08 -0000
@@ -11864,7 +11864,7 @@ msgstr "Generér kode til en 11/45"
msgid "Generate code for an 11/10"
msgstr "Generér kode til en 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/de.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/de.po,v
retrieving revision 1.13
diff -u -p -r1.13 de.po
--- gcc/po/de.po 15 May 2004 19:13:02 -0000 1.13
+++ gcc/po/de.po 7 Jul 2004 06:19:19 -0000
@@ -11482,7 +11482,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/el.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/el.po,v
retrieving revision 1.5
diff -u -p -r1.5 el.po
--- gcc/po/el.po 15 May 2004 19:13:03 -0000 1.5
+++ gcc/po/el.po 7 Jul 2004 06:19:28 -0000
@@ -11814,7 +11814,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/es.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/es.po,v
retrieving revision 1.10
diff -u -p -r1.10 es.po
--- gcc/po/es.po 23 May 2004 01:11:39 -0000 1.10
+++ gcc/po/es.po 7 Jul 2004 06:19:45 -0000
@@ -11477,7 +11477,7 @@ msgstr "Generar código para un 11/45"
msgid "Generate code for an 11/10"
msgstr "Generar código para un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/fr.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/fr.po,v
retrieving revision 1.15
diff -u -p -r1.15 fr.po
--- gcc/po/fr.po 26 May 2004 09:20:56 -0000 1.15
+++ gcc/po/fr.po 7 Jul 2004 06:20:02 -0000
@@ -11613,7 +11613,7 @@ msgstr "Générer du code pour un 11/45"
msgid "Generate code for an 11/10"
msgstr "Générer du code pour un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/gcc.pot
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/gcc.pot,v
retrieving revision 1.25
diff -u -p -r1.25 gcc.pot
--- gcc/po/gcc.pot 18 May 2004 01:26:17 -0000 1.25
+++ gcc/po/gcc.pot 7 Jul 2004 06:20:09 -0000
@@ -11491,7 +11491,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/ja.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/ja.po,v
retrieving revision 1.6
diff -u -p -r1.6 ja.po
--- gcc/po/ja.po 15 May 2004 19:13:05 -0000 1.6
+++ gcc/po/ja.po 7 Jul 2004 06:20:23 -0000
@@ -12003,7 +12003,7 @@ msgstr "11/45 ÍѤΥ³¡¼¥É¤òÀ¸À®¤¹¤ë"
msgid "Generate code for an 11/10"
msgstr "11/10 ÍѤΥ³¡¼¥É¤òÀ¸À®¤¹¤ë"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/nl.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/nl.po,v
retrieving revision 1.6
diff -u -p -r1.6 nl.po
--- gcc/po/nl.po 15 May 2004 19:13:09 -0000 1.6
+++ gcc/po/nl.po 7 Jul 2004 06:20:33 -0000
@@ -11932,7 +11932,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/sv.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/sv.po,v
retrieving revision 1.7
diff -u -p -r1.7 sv.po
--- gcc/po/sv.po 15 May 2004 19:13:09 -0000 1.7
+++ gcc/po/sv.po 7 Jul 2004 06:20:43 -0000
@@ -11862,7 +11862,7 @@ msgstr "Generera kod för 11/45"
msgid "Generate code for an 11/10"
msgstr "Generera kod för 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/tr.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/tr.po,v
retrieving revision 1.8
diff -u -p -r1.8 tr.po
--- gcc/po/tr.po 21 May 2004 22:24:47 -0000 1.8
+++ gcc/po/tr.po 7 Jul 2004 06:21:00 -0000
@@ -11549,7 +11549,7 @@ msgstr "Kod bir 11/45 için üretilir"
msgid "Generate code for an 11/10"
msgstr "Kod bir 11/10 için üretilir"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c,v
retrieving revision 1.1
diff -u -p -r1.1 mempcpy-2.c
--- gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c 3 Jul 2004 02:16:49 -0000 1.1
+++ gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c 7 Jul 2004 06:21:05 -0000
@@ -68,7 +68,7 @@ test (long *buf3, char *buf4, char *buf6
__builtin_memcpy (buf3, "aBcdEFghijklmnopq\0", 19);
- /* These should be handled either by movstrendM or mempcpy
+ /* These should be handled either by movmemendM or mempcpy
call. */
if (mempcpy ((char *) buf3 + 4, buf5, n + 6) != (char *) buf1 + 10
|| memcmp (buf1, "aBcdRSTUVWklmnopq\0", 19))
@@ -125,7 +125,7 @@ test (long *buf3, char *buf4, char *buf6
__builtin_memcpy (buf4, "aBcdEFghijklmnopq\0", 19);
- /* These should be handled either by movstrendM or mempcpy
+ /* These should be handled either by movmemendM or mempcpy
call. */
if (mempcpy (buf4 + 4, buf7, n + 6) != buf2 + 10
|| memcmp (buf2, "aBcdRSTUVWklmnopq\0", 19))
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 7:06 ` Alexandre Oliva
@ 2004-07-07 9:06 ` Richard Henderson
2004-07-08 0:14 ` Alexandre Oliva
2004-07-07 9:13 ` Joseph S. Myers
1 sibling, 1 reply; 32+ messages in thread
From: Richard Henderson @ 2004-07-07 9:06 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: gcc-patches, rsandifo
On Wed, Jul 07, 2004 at 03:55:43AM -0300, Alexandre Oliva wrote:
> Can do. Patch is attached. Will test i686-pc-linux-gnu native
> overnight. Ok to install if it passes?
Ok.
> However, even if it's close to stpcpy(), some arches will have the
> final register point one-past the NUL terminator, whereas others might
> have it point to the NUL terminator itself. I suppose we should
> probably model movstr exactly after stpcpy(), even if that takes an
> additional increment/decrement instruction to get the right value.
Probably. With one output.
r~
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 7:06 ` Alexandre Oliva
2004-07-07 9:06 ` Richard Henderson
@ 2004-07-07 9:13 ` Joseph S. Myers
2004-07-07 19:44 ` Alexandre Oliva
1 sibling, 1 reply; 32+ messages in thread
From: Joseph S. Myers @ 2004-07-07 9:13 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Richard Henderson, gcc-patches, rsandifo
On Wed, 7 Jul 2004, Alexandre Oliva wrote:
> * po/gcc.pot: Rename movstr*, except for movstrict*, to
> movmem* and clrstr* to clrmem*.
> * po/be.po: Likewise.
[...]
You don't ever patch the .po files; such changes just get lost when the
next version is imported from the TP. If really necessary, you send
changes to the individual translation teams for them to include in their
next updates. Nor do you patch gcc.pot; regenerate it following the
instructions in translation.html instead.
--
Joseph S. Myers http://www.srcf.ucam.org/~jsm28/gcc/
jsm@polyomino.org.uk (personal mail)
jsm28@gcc.gnu.org (Bugzilla assignments and CCs)
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 9:13 ` Joseph S. Myers
@ 2004-07-07 19:44 ` Alexandre Oliva
0 siblings, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-07 19:44 UTC (permalink / raw)
To: Joseph S. Myers; +Cc: Richard Henderson, gcc-patches, rsandifo
On Jul 7, 2004, "Joseph S. Myers" <jsm@polyomino.org.uk> wrote:
> On Wed, 7 Jul 2004, Alexandre Oliva wrote:
>> * po/gcc.pot: Rename movstr*, except for movstrict*, to
>> movmem* and clrstr* to clrmem*.
>> * po/be.po: Likewise.
> [...]
> You don't ever patch the .po files; such changes just get lost when the
> next version is imported from the TP.
Aah. Ok, I'm leaving these out. Thanks,
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-06-21 17:12 ` Kazu Hirata
2004-06-23 2:23 ` Alexandre Oliva
@ 2004-07-07 22:11 ` Alexandre Oliva
2004-07-08 6:08 ` Richard Sandiford
1 sibling, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-07 22:11 UTC (permalink / raw)
To: Kazu Hirata; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 423 bytes --]
On Jun 21, 2004, Kazu Hirata <kazu@cs.umass.edu> wrote:
> Hi Alex,
>> Bootstrapped on i686-pc-linux-gnu native, and cross-built and tested
>> for target h8300-elf. Ok to install?
> The H8 portion is OK.
Here are some additional patches, that should apply atop of the
already-posted h8sx patches, that I intend to bundle with the upcoming
final version of the h8sx patch. Kazu, do you have a problem with any
of them?
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: gcc-h8sx-cant-delay-call.patch --]
[-- Type: text/x-patch, Size: 1976 bytes --]
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* config/h8300/h8300.md (attr type): Add call.
(attr can_delay): If type is call, set it no.
(call, call_value): Set type to call.
Index: gcc/config/h8300/h8300.md
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.md,v
retrieving revision 1.7
diff -u -p -r1.7 h8300.md
--- gcc/config/h8300/h8300.md 27 Jun 2004 03:45:42 -0000 1.7
+++ gcc/config/h8300/h8300.md 27 Jun 2004 05:19:31 -0000
@@ -75,7 +75,7 @@
(define_attr "cpu" "h8300,h8300h"
(const (symbol_ref "cpu_type")))
-(define_attr "type" "branch,arith,bitbranch"
+(define_attr "type" "branch,arith,bitbranch,call"
(const_string "arith"))
(define_attr "length_table" "none,addb,addw,addl,logicb,movb,movw,movl,mova_zero,mova,unary,mov_imm4,short_immediate,bitfield,bitbranch"
@@ -145,9 +145,12 @@
(define_attr "delay_slot" "none,jump"
(const_string "none"))
-;; "yes" if the instruction can be put into a delay slot.
+;; "yes" if the instruction can be put into a delay slot. It's not
+;; entirely clear that jsr is not valid in delay slots, but it
+;; definitely doesn't have the effect of causing the called function
+;; to return to the target of the delayed branch.
(define_attr "can_delay" "no,yes"
- (cond [(eq_attr "type" "branch,bitbranch")
+ (cond [(eq_attr "type" "branch,bitbranch,call")
(const_string "no")
(ne (symbol_ref "get_attr_length (insn)") (const_int 2))
(const_string "no")]
@@ -2493,6 +2496,7 @@
return \"jsr\\t%0\";
}"
[(set_attr "cc" "clobber")
+ (set_attr "type" "call")
(set (attr "length")
(if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
(const_int 2)
@@ -2517,6 +2521,7 @@
return \"jsr\\t%1\";
}"
[(set_attr "cc" "clobber")
+ (set_attr "type" "call")
(set (attr "length")
(if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
(const_int 2)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: gcc-h8sx-index-mode.patch --]
[-- Type: text/x-patch, Size: 2748 bytes --]
Index: gcc/ChangeLog.RedHat
from Alexandre Oliva <aoliva@redhat.com>
* config/h8300/h8300-protos.h (h8300_legitimate_address_p): Add
mode argument.
* config/h8300/h8300.h (GO_IF_LEGITIMATE_ADDRESS): Pass it to...
* config/h8300/h8300.c (h8300_legitimate_address_p): Pass it to
h8300_get_index.
Index: gcc/config/h8300/h8300-protos.h
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/h8300/h8300-protos.h,v
retrieving revision 1.38
diff -u -p -r1.38 h8300-protos.h
--- gcc/config/h8300/h8300-protos.h 7 Mar 2004 23:29:18 -0000 1.38
+++ gcc/config/h8300/h8300-protos.h 27 Jun 2004 08:02:37 -0000
@@ -84,7 +84,7 @@ extern int same_cmp_preceding_p (rtx);
extern int same_cmp_following_p (rtx);
extern int h8300_legitimate_constant_p (rtx);
-extern int h8300_legitimate_address_p (rtx, int);
+extern int h8300_legitimate_address_p (enum machine_mode, rtx, int);
/* Used in builtins.c */
extern rtx h8300_return_addr_rtx (int, rtx);
Index: gcc/config/h8300/h8300.c
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/h8300/h8300.c,v
retrieving revision 1.157
diff -u -p -r1.157 h8300.c
--- gcc/config/h8300/h8300.c 21 Jun 2004 19:16:30 -0000 1.157
+++ gcc/config/h8300/h8300.c 27 Jun 2004 08:02:40 -0000
@@ -6369,7 +6369,7 @@ h8300_rtx_ok_for_base_p (rtx x, int stri
CONSTANT_ADDRESS. */
int
-h8300_legitimate_address_p (rtx x, int strict)
+h8300_legitimate_address_p (enum machine_mode mode, rtx x, int strict)
{
/* The register indirect addresses like @er0 is always valid. */
if (h8300_rtx_ok_for_base_p (x, strict))
@@ -6393,5 +6393,5 @@ h8300_legitimate_address_p (rtx x, int s
&& h8300_rtx_ok_for_base_p (h8300_get_index (XEXP (x, 0),
- GET_MODE (x), 0), strict))
+ mode, 0), strict))
return 1;
return 0;
Index: gcc/config/h8300/h8300.h
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/h8300/h8300.h,v
retrieving revision 1.162
diff -u -p -r1.162 h8300.h
--- gcc/config/h8300/h8300.h 18 Jun 2004 04:07:04 -0000 1.162
+++ gcc/config/h8300/h8300.h 27 Jun 2004 08:02:41 -0000
@@ -1028,7 +1028,7 @@ struct cum_arg
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
do \
{ \
- if (h8300_legitimate_address_p ((X), 0)) \
+ if (h8300_legitimate_address_p ((MODE), (X), 0)) \
goto ADDR; \
} \
while (0)
@@ -1036,7 +1037,7 @@ struct cum_arg
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
do \
{ \
- if (h8300_legitimate_address_p ((X), 1)) \
+ if (h8300_legitimate_address_p ((MODE), (X), 1)) \
goto ADDR; \
} \
while (0)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #4: gcc-h8sx-movsmd.patch --]
[-- Type: text/x-patch, Size: 10233 bytes --]
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* config/h8300/h8300.c (h8300_reg_class_from_letter): Map 'D' to
GENERAL_REGS, always.
(h8300_swap_into_er6, h8300_swap_into_er6): Handle the case of
getting the stack pointer as addr.
* config/h8300/h8300.h (PREDICATE_CODES): Remove constant rtxes
from general_operand_dst.
(movmd_internal_normal): New, normal-mode variant of...
(movmd_internal): ... this. Add modes to operands. Disparage `D'
instead of requiring it to match only before reload.
(stpcpy_internal_normal): New, normal-mode variant of...
(stpcpy_internal): ... this. Add modes to operands. Disparage
`D' instead of requiring it to match only before reload.
Index: gcc/config/h8300/h8300.c
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.c,v
retrieving revision 1.6
diff -u -p -r1.6 h8300.c
--- gcc/config/h8300/h8300.c 21 Jun 2004 19:20:15 -0000 1.6
+++ gcc/config/h8300/h8300.c 27 Jun 2004 03:42:35 -0000
@@ -454,12 +454,16 @@ h8300_init_once (void)
before reload so that register allocator will pick the second
alternative.
- - 'D' should be NO_REGS when the frame pointer isn't live.
- The idea is to *make* it live by restricting the register allocator
- to the first alternative. This isn't needed for correctness
- but it produces better code for small functions: it's more
- efficient to save and restore er6 in the prologue & epilogue
- than to do it in a define_split. */
+ - we would like 'D' to be be NO_REGS when the frame pointer isn't
+ live, but we the frame pointer may turn out to be needed after
+ we start reload, and then we may have already decided we don't
+ have a choice, so we can't do that. Forcing the register
+ allocator to use er6 if possible might produce better code for
+ small functions: it's more efficient to save and restore er6 in
+ the prologue & epilogue than to do it in a define_split.
+ Hopefully disparaging 'D' will have a similar effect, without
+ forcing a reload failure if the frame pointer is found to be
+ needed too late. */
enum reg_class
h8300_reg_class_from_letter (int c)
@@ -480,8 +484,8 @@ h8300_reg_class_from_letter (int c)
return DESTINATION_REGS;
case 'D':
- if (!regs_ever_live[FP_REG])
- return NO_REGS;
+ /* The meaning of a constraint shouldn't change dynamically, so
+ we can't make this NO_REGS. */
return GENERAL_REGS;
case 'f':
@@ -3005,6 +3009,10 @@ h8300_swap_into_er6 (rtx addr)
{
push (HARD_FRAME_POINTER_REGNUM);
emit_move_insn (hard_frame_pointer_rtx, addr);
+ if (REGNO (addr) == SP_REG)
+ emit_move_insn (hard_frame_pointer_rtx,
+ plus_constant (hard_frame_pointer_rtx,
+ GET_MODE_SIZE (word_mode)));
}
/* Move the current value of er6 into ADDR and pop its old value
@@ -3013,7 +3021,8 @@ h8300_swap_into_er6 (rtx addr)
void
h8300_swap_out_of_er6 (rtx addr)
{
- emit_move_insn (addr, hard_frame_pointer_rtx);
+ if (REGNO (addr) != SP_REG)
+ emit_move_insn (addr, hard_frame_pointer_rtx);
pop (HARD_FRAME_POINTER_REGNUM);
}
\f
Index: gcc/config/h8300/h8300.h
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.h,v
retrieving revision 1.5
diff -u -p -r1.5 h8300.h
--- gcc/config/h8300/h8300.h 21 Jun 2004 12:16:04 -0000 1.5
+++ gcc/config/h8300/h8300.h 27 Jun 2004 03:42:36 -0000
@@ -1335,8 +1335,7 @@ extern int h8300_move_ratio;
#define PREDICATE_CODES \
{"general_operand_src", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
- {"general_operand_dst", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
- LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
+ {"general_operand_dst", {SUBREG, REG, MEM, ADDRESSOF}}, \
{"h8300_src_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
{"h8300_dst_operand", {SUBREG, REG, MEM, ADDRESSOF}}, \
Index: gcc/config/h8300/h8300.md
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gcc/config/h8300/h8300.md,v
retrieving revision 1.6
diff -u -p -r1.6 h8300.md
--- gcc/config/h8300/h8300.md 21 Jun 2004 19:20:15 -0000 1.6
+++ gcc/config/h8300/h8300.md 27 Jun 2004 03:42:37 -0000
@@ -508,16 +508,33 @@
;; This is a difficult instruction to reload since operand 0 must be the
;; frame pointer. See h8300_reg_class_from_letter for an explanation.
+(define_insn "movmd_internal_normal"
+ [(set (mem:BLK (match_operand:HI 3 "register_operand" "0,r"))
+ (mem:BLK (match_operand:HI 4 "register_operand" "1,1")))
+ (unspec [(match_operand:HI 5 "register_operand" "2,2")
+ (match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
+ (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:HI 1 "register_operand" "=f,f"))
+ (set (match_operand:HI 2 "register_operand" "=c,c")
+ (const_int 0))]
+ "TARGET_H8300SX && TARGET_NORMAL_MODE"
+ "@
+ movmd%m6
+ #"
+ [(set_attr "length" "2,14")
+ (set_attr "can_delay" "no")
+ (set_attr "cc" "none,clobber")])
+
(define_insn "movmd_internal"
- [(set (mem:BLK (match_operand 3 "register_operand" "0,r"))
- (mem:BLK (match_operand 4 "register_operand" "1,1")))
+ [(set (mem:BLK (match_operand:SI 3 "register_operand" "0,r"))
+ (mem:BLK (match_operand:SI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
- (clobber (match_operand 0 "register_operand" "=d,!D"))
- (clobber (match_operand 1 "register_operand" "=f,f"))
+ (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:SI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
- "TARGET_H8300SX"
+ "TARGET_H8300SX && !TARGET_NORMAL_MODE"
"@
movmd%m6
#"
@@ -541,11 +558,34 @@
(match_operand:BLK 1 "memory_operand" ""))
(unspec [(match_operand:HI 2 "register_operand" "")
(match_operand:HI 3 "const_int_operand" "")] UNSPEC_MOVMD)
- (clobber (match_operand 4 "register_operand" ""))
- (clobber (match_operand 5 "register_operand" ""))
+ (clobber (match_operand:HI 4 "register_operand" ""))
+ (clobber (match_operand:HI 5 "register_operand" ""))
(set (match_dup 2)
(const_int 0))]
- "TARGET_H8300SX
+ "TARGET_H8300SX && TARGET_NORMAL_MODE
+ && reload_completed
+ && REGNO (operands[4]) != DESTINATION_REG"
+ [(const_int 0)]
+ {
+ rtx dest;
+
+ h8300_swap_into_er6 (XEXP (operands[0], 0));
+ dest = replace_equiv_address (operands[0], hard_frame_pointer_rtx);
+ emit_insn (gen_movmd (dest, operands[1], operands[2], operands[3]));
+ h8300_swap_out_of_er6 (operands[4]);
+ DONE;
+ })
+
+(define_split
+ [(set (match_operand:BLK 0 "memory_operand" "")
+ (match_operand:BLK 1 "memory_operand" ""))
+ (unspec [(match_operand:HI 2 "register_operand" "")
+ (match_operand:HI 3 "const_int_operand" "")] UNSPEC_MOVMD)
+ (clobber (match_operand:SI 4 "register_operand" ""))
+ (clobber (match_operand:SI 5 "register_operand" ""))
+ (set (match_dup 2)
+ (const_int 0))]
+ "TARGET_H8300SX && !TARGET_NORMAL_MODE
&& reload_completed
&& REGNO (operands[4]) != DESTINATION_REG"
[(const_int 0)]
@@ -594,14 +634,28 @@
})
;; See comments above memcpy_internal().
+(define_insn "stpcpy_internal_normal"
+ [(set (mem:BLK (match_operand:HI 3 "register_operand" "0,r"))
+ (unspec [(mem:BLK (match_operand:HI 4 "register_operand" "1,1"))]
+ UNSPEC_STPCPY))
+ (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:HI 1 "register_operand" "=f,f"))
+ (clobber (match_operand:HI 2 "register_operand" "=c,c"))]
+ "TARGET_H8300SX && TARGET_NORMAL_MODE"
+ "@
+ \n1:\tmovsd\t2f\;bra\t1b\n2:
+ #"
+ [(set_attr "length" "6,18")
+ (set_attr "cc" "none,clobber")])
+
(define_insn "stpcpy_internal"
- [(set (mem:BLK (match_operand 3 "register_operand" "0,r"))
- (unspec [(mem:BLK (match_operand 4 "register_operand" "1,1"))]
+ [(set (mem:BLK (match_operand:SI 3 "register_operand" "0,r"))
+ (unspec [(mem:BLK (match_operand:SI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
- (clobber (match_operand 0 "register_operand" "=d,!D"))
- (clobber (match_operand 1 "register_operand" "=f,f"))
- (clobber (match_operand 2 "register_operand" "=c,c"))]
- "TARGET_H8300SX"
+ (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:SI 1 "register_operand" "=f,f"))
+ (clobber (match_operand:SI 2 "register_operand" "=c,c"))]
+ "TARGET_H8300SX && !TARGET_NORMAL_MODE"
"@
\n1:\tmovsd\t2f\;bra\t1b\n2:
#"
@@ -613,10 +667,30 @@
(define_split
[(set (match_operand:BLK 0 "memory_operand" "")
(unspec [(match_operand:BLK 1 "memory_operand" "")] UNSPEC_STPCPY))
- (clobber (match_operand 2 "register_operand" ""))
- (clobber (match_operand 3 "register_operand" ""))
- (clobber (match_operand 4 "register_operand" ""))]
- "TARGET_H8300SX
+ (clobber (match_operand:HI 2 "register_operand" ""))
+ (clobber (match_operand:HI 3 "register_operand" ""))
+ (clobber (match_operand:HI 4 "register_operand" ""))]
+ "TARGET_H8300SX && TARGET_NORMAL_MODE
+ && reload_completed
+ && REGNO (operands[2]) != DESTINATION_REG"
+ [(const_int 0)]
+ {
+ rtx dest;
+
+ h8300_swap_into_er6 (XEXP (operands[0], 0));
+ dest = replace_equiv_address (operands[0], hard_frame_pointer_rtx);
+ emit_insn (gen_movsd (dest, operands[1], operands[4]));
+ h8300_swap_out_of_er6 (operands[2]);
+ DONE;
+ })
+
+(define_split
+ [(set (match_operand:BLK 0 "memory_operand" "")
+ (unspec [(match_operand:BLK 1 "memory_operand" "")] UNSPEC_STPCPY))
+ (clobber (match_operand:SI 2 "register_operand" ""))
+ (clobber (match_operand:SI 3 "register_operand" ""))
+ (clobber (match_operand:SI 4 "register_operand" ""))]
+ "TARGET_H8300SX && !TARGET_NORMAL_MODE
&& reload_completed
&& REGNO (operands[2]) != DESTINATION_REG"
[(const_int 0)]
[-- Attachment #5: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 9:06 ` Richard Henderson
@ 2004-07-08 0:14 ` Alexandre Oliva
2004-07-08 1:22 ` Richard Henderson
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 0:14 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, rsandifo
On Jul 7, 2004, Richard Henderson <rth@redhat.com> wrote:
> On Wed, Jul 07, 2004 at 03:55:43AM -0300, Alexandre Oliva wrote:
>> However, even if it's close to stpcpy(), some arches will have the
>> final register point one-past the NUL terminator, whereas others might
>> have it point to the NUL terminator itself. I suppose we should
>> probably model movstr exactly after stpcpy(), even if that takes an
>> additional increment/decrement instruction to get the right value.
> Probably. With one output.
Is this sort of what you were expecting? Ok to install along with the
H8SX patch, if it passes a build&test cycle?
Index: builtins.c
===================================================================
RCS file: /cvs/uberbaum/gcc/builtins.c,v
retrieving revision 1.347
diff -u -p -d -u -p -d -u -p -r1.347 builtins.c
--- builtins.c 7 Jul 2004 19:23:54 -0000 1.347
+++ builtins.c 7 Jul 2004 23:05:47 -0000
@@ -2976,6 +2976,70 @@ expand_builtin_bcopy (tree arglist)
return expand_builtin_memmove (newarglist, const0_rtx, VOIDmode);
}
+/* Expand into a movstr instruction, if one is available. Return 0 if
+ we failed, the caller should emit a normal call, otherwise try to
+ get the result in TARGET, if convenient (and in mode MODE if that's
+ convenient). If ENDP is 0 return the destination pointer, if ENDP
+ is 1 return the end pointer ala mempcpy, and if ENDP is 2 return
+ the end pointer minus one ala stpcpy. */
+
+static rtx
+expand_movstr (tree dest ATTRIBUTE_UNUSED,
+ tree src ATTRIBUTE_UNUSED,
+ rtx target ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
+ int endp ATTRIBUTE_UNUSED)
+{
+#ifndef HAVE_movstr
+ return 0;
+#else
+ rtx end;
+ rtx dest_mem;
+ rtx src_mem;
+ rtx insn;
+ const struct insn_data * data;
+
+ if (!HAVE_movstr)
+ return 0;
+
+ dest_mem = get_memory_rtx (dest);
+ src_mem = get_memory_rtx (src);
+ if (!endp)
+ {
+ XEXP (dest_mem, 0) = force_reg (Pmode, XEXP (dest_mem, 0));
+ target = XEXP (dest_mem, 0);
+ end = gen_reg_rtx (Pmode);
+ }
+ else
+ {
+ if (target == 0 || target == const0_rtx)
+ end = gen_reg_rtx (Pmode);
+ if (target == 0)
+ target = end;
+ }
+
+ data = insn_data + CODE_FOR_movstr;
+
+ if (data->operand[0].mode != VOIDmode)
+ end = gen_lowpart (data->operand[0].mode, end);
+
+ insn = data->genfun (end, dest_mem, src_mem);
+
+ if (insn == 0)
+ abort ();
+
+ emit_insn (insn);
+
+ /* movstr is supposed to set end to the address of the NUL
+ terminator. If the caller requested a mempcpy-like return value,
+ adjust it. */
+ if (endp == 1 && target != const0_rtx)
+ emit_move_insn (end, plus_constant (end, 1));
+
+ return target;
+#endif
+}
+
/* Expand expression EXP, which is a call to the strcpy builtin. Return 0
if we failed the caller should emit a normal call, otherwise try to get
the result in TARGET, if convenient (and in mode MODE if that's
@@ -2996,12 +3060,14 @@ expand_builtin_strcpy (tree arglist, rtx
if (operand_equal_p (src, dst, 0))
return expand_expr (dst, target, mode, EXPAND_NORMAL);
- fn = implicit_built_in_decls[BUILT_IN_MEMCPY];
- if (!fn)
- return 0;
-
len = c_strlen (src, 1);
if (len == 0 || TREE_SIDE_EFFECTS (len))
+ return expand_movstr (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, mode, /*endp=*/0);
+
+ fn = implicit_built_in_decls[BUILT_IN_MEMCPY];
+ if (!fn)
return 0;
len = size_binop (PLUS_EXPR, len, ssize_int (1));
@@ -3020,30 +3086,25 @@ expand_builtin_strcpy (tree arglist, rtx
static rtx
expand_builtin_stpcpy (tree arglist, rtx target, enum machine_mode mode)
{
+ /* If return value is ignored, transform stpcpy into strcpy. */
+ if (target == const0_rtx)
+ return expand_builtin_strcpy (arglist, target, mode);
+
if (!validate_arglist (arglist, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
return 0;
else
{
tree dst, src, len;
- /* If return value is ignored, transform stpcpy into strcpy. */
- if (target == const0_rtx)
- {
- tree fn = implicit_built_in_decls[BUILT_IN_STRCPY];
- if (!fn)
- return 0;
-
- return expand_expr (build_function_call_expr (fn, arglist),
- target, mode, EXPAND_NORMAL);
- }
-
/* Ensure we get an actual string whose length can be evaluated at
compile-time, not an expression containing a string. This is
because the latter will potentially produce pessimized code
when used to produce the return value. */
src = TREE_VALUE (TREE_CHAIN (arglist));
if (! c_getstr (src) || ! (len = c_strlen (src, 0)))
- return 0;
+ return expand_movstr (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, mode, /*endp=*/2);
dst = TREE_VALUE (arglist);
len = fold (size_binop (PLUS_EXPR, len, ssize_int (1)));
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 0:14 ` Alexandre Oliva
@ 2004-07-08 1:22 ` Richard Henderson
2004-07-08 1:26 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Henderson @ 2004-07-08 1:22 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: gcc-patches, rsandifo
On Wed, Jul 07, 2004 at 08:07:24PM -0300, Alexandre Oliva wrote:
> +#ifndef HAVE_movstr
> + return 0;
> +#else
One change; please do the macro frobbing to avoid the conditional
compilation.
r~
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 1:22 ` Richard Henderson
@ 2004-07-08 1:26 ` Alexandre Oliva
2004-07-08 2:01 ` Richard Henderson
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 1:26 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 5929 bytes --]
On Jul 7, 2004, Richard Henderson <rth@redhat.com> wrote:
> On Wed, Jul 07, 2004 at 08:07:24PM -0300, Alexandre Oliva wrote:
>> +#ifndef HAVE_movstr
>> + return 0;
>> +#else
> One change; please do the macro frobbing to avoid the conditional
> compilation.
Doh, I hadn't found precedent for defaulting CODE_FOR_<insn> before.
How about this? I fixed a bug of uninitialized `end' and added more
cases to expand_builtin_stpcpy() to get strcpy and stpcpy inlined in
all cases for the attached testcase, compiled with -O3.
How's this patchlet?
Index: builtins.c
===================================================================
RCS file: /cvs/uberbaum/gcc/builtins.c,v
retrieving revision 1.347
diff -u -p -d -u -p -d -u -p -r1.347 builtins.c
--- builtins.c 7 Jul 2004 19:23:54 -0000 1.347
+++ builtins.c 8 Jul 2004 01:05:29 -0000
@@ -2976,6 +2976,72 @@ expand_builtin_bcopy (tree arglist)
return expand_builtin_memmove (newarglist, const0_rtx, VOIDmode);
}
+#ifndef HAVE_movstr
+# define HAVE_movstr 0
+# define CODE_FOR_movstr CODE_FOR_nothing
+#endif
+
+/* Expand into a movstr instruction, if one is available. Return 0 if
+ we failed, the caller should emit a normal call, otherwise try to
+ get the result in TARGET, if convenient (and in mode MODE if that's
+ convenient). If ENDP is 0 return the destination pointer, if ENDP
+ is 1 return the end pointer ala mempcpy, and if ENDP is 2 return
+ the end pointer minus one ala stpcpy. */
+
+static rtx
+expand_movstr (tree dest, tree src, rtx target,
+ enum machine_mode mode, int endp)
+{
+ rtx end;
+ rtx dest_mem;
+ rtx src_mem;
+ rtx insn;
+ const struct insn_data * data;
+
+ if (!HAVE_movstr)
+ return 0;
+
+ dest_mem = get_memory_rtx (dest);
+ src_mem = get_memory_rtx (src);
+ if (!endp)
+ {
+ XEXP (dest_mem, 0) = force_reg (Pmode, XEXP (dest_mem, 0));
+ target = XEXP (dest_mem, 0);
+ end = gen_reg_rtx (Pmode);
+ }
+ else
+ {
+ if (target == 0 || target == const0_rtx)
+ {
+ end = gen_reg_rtx (Pmode);
+ if (target == 0)
+ target = end;
+ }
+ else
+ end = target;
+ }
+
+ data = insn_data + CODE_FOR_movstr;
+
+ if (data->operand[0].mode != VOIDmode)
+ end = gen_lowpart (data->operand[0].mode, end);
+
+ insn = data->genfun (end, dest_mem, src_mem);
+
+ if (insn == 0)
+ abort ();
+
+ emit_insn (insn);
+
+ /* movstr is supposed to set end to the address of the NUL
+ terminator. If the caller requested a mempcpy-like return value,
+ adjust it. */
+ if (endp == 1 && target != const0_rtx)
+ emit_move_insn (end, plus_constant (end, 1));
+
+ return target;
+}
+
/* Expand expression EXP, which is a call to the strcpy builtin. Return 0
if we failed the caller should emit a normal call, otherwise try to get
the result in TARGET, if convenient (and in mode MODE if that's
@@ -2996,12 +3062,14 @@ expand_builtin_strcpy (tree arglist, rtx
if (operand_equal_p (src, dst, 0))
return expand_expr (dst, target, mode, EXPAND_NORMAL);
- fn = implicit_built_in_decls[BUILT_IN_MEMCPY];
- if (!fn)
- return 0;
-
len = c_strlen (src, 1);
if (len == 0 || TREE_SIDE_EFFECTS (len))
+ return expand_movstr (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, mode, /*endp=*/0);
+
+ fn = implicit_built_in_decls[BUILT_IN_MEMCPY];
+ if (!fn)
return 0;
len = size_binop (PLUS_EXPR, len, ssize_int (1));
@@ -3020,22 +3088,17 @@ expand_builtin_strcpy (tree arglist, rtx
static rtx
expand_builtin_stpcpy (tree arglist, rtx target, enum machine_mode mode)
{
+ /* If return value is ignored, transform stpcpy into strcpy. */
+ if (target == const0_rtx)
+ return expand_builtin_strcpy (arglist, target, mode);
+
if (!validate_arglist (arglist, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
return 0;
else
{
tree dst, src, len;
-
- /* If return value is ignored, transform stpcpy into strcpy. */
- if (target == const0_rtx)
- {
- tree fn = implicit_built_in_decls[BUILT_IN_STRCPY];
- if (!fn)
- return 0;
-
- return expand_expr (build_function_call_expr (fn, arglist),
- target, mode, EXPAND_NORMAL);
- }
+ tree narglist;
+ rtx ret;
/* Ensure we get an actual string whose length can be evaluated at
compile-time, not an expression containing a string. This is
@@ -3043,14 +3106,46 @@ expand_builtin_stpcpy (tree arglist, rtx
when used to produce the return value. */
src = TREE_VALUE (TREE_CHAIN (arglist));
if (! c_getstr (src) || ! (len = c_strlen (src, 0)))
- return 0;
+ return expand_movstr (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, mode, /*endp=*/2);
dst = TREE_VALUE (arglist);
len = fold (size_binop (PLUS_EXPR, len, ssize_int (1)));
- arglist = build_tree_list (NULL_TREE, len);
- arglist = tree_cons (NULL_TREE, src, arglist);
- arglist = tree_cons (NULL_TREE, dst, arglist);
- return expand_builtin_mempcpy (arglist, target, mode, /*endp=*/2);
+ narglist = build_tree_list (NULL_TREE, len);
+ narglist = tree_cons (NULL_TREE, src, narglist);
+ narglist = tree_cons (NULL_TREE, dst, narglist);
+ ret = expand_builtin_mempcpy (narglist, target, mode, /*endp=*/2);
+
+ if (ret)
+ return ret;
+
+ if (TREE_CODE (len) == INTEGER_CST)
+ {
+ rtx len_rtx = expand_expr (len, NULL_RTX, VOIDmode, 0);
+
+ if (GET_CODE (len_rtx) == CONST_INT)
+ {
+ ret = expand_builtin_strcpy (arglist, target, mode);
+
+ if (ret)
+ {
+ target = ret;
+
+ ret = emit_move_insn (target,
+ plus_constant (target,
+ INTVAL (len_rtx)));
+ if (! ret)
+ abort ();
+
+ return target;
+ }
+ }
+ }
+
+ return expand_movstr (TREE_VALUE (arglist),
+ TREE_VALUE (TREE_CHAIN (arglist)),
+ target, mode, /*endp=*/2);
}
}
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: t.c --]
[-- Type: text/x-c, Size: 369 bytes --]
char *copy(char *dest, const char *src) {
return strcpy(dest, src);
}
char *copy2(char *dest, const char *src) {
return stpcpy(dest, src);
}
char *copy3(char *dest) {
return copy(dest, "this is a test");
}
char *copy4(char *dest) {
return copy2(dest, "this is a test");
}
void copy5(char *dest) {
copy3(dest);
}
void copy6(char *dest) {
copy4(dest);
}
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 1:26 ` Alexandre Oliva
@ 2004-07-08 2:01 ` Richard Henderson
2004-07-08 4:39 ` Alexandre Oliva
2004-07-08 18:59 ` Alexandre Oliva
0 siblings, 2 replies; 32+ messages in thread
From: Richard Henderson @ 2004-07-08 2:01 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: gcc-patches, rsandifo
On Wed, Jul 07, 2004 at 10:06:38PM -0300, Alexandre Oliva wrote:
> How's this patchlet?
Ok.
r~
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 2:01 ` Richard Henderson
@ 2004-07-08 4:39 ` Alexandre Oliva
2004-07-08 18:59 ` Alexandre Oliva
1 sibling, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 4:39 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 531 bytes --]
On Jul 7, 2004, Richard Henderson <rth@redhat.com> wrote:
> On Wed, Jul 07, 2004 at 10:06:38PM -0300, Alexandre Oliva wrote:
>> How's this patchlet?
> Ok.
Thanks. Here's the full h8sx patch, including the patch you just
approved (with a minor tweak to make sure it doesn't modify the
incoming address of dest in the case of expanding stpcpy to strcpy
followed by adding a value to what it returns) and all
previously-posted H8SX-related changes. I've verified that the
h8300-elf toolchain builds correctly after this patch.
[-- Attachment #2: gcc-h8sx.patch.bz2 --]
[-- Type: application/x-bzip2, Size: 39190 bytes --]
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-07 22:11 ` Alexandre Oliva
@ 2004-07-08 6:08 ` Richard Sandiford
2004-07-08 7:41 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-08 6:08 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
> + - we would like 'D' to be be NO_REGS when the frame pointer isn't
> + live, but we the frame pointer may turn out to be needed after
> + we start reload, and then we may have already decided we don't
> + have a choice, so we can't do that. Forcing the register
> + allocator to use er6 if possible might produce better code for
> + small functions: it's more efficient to save and restore er6 in
> + the prologue & epilogue than to do it in a define_split.
> + Hopefully disparaging 'D' will have a similar effect, without
> + forcing a reload failure if the frame pointer is found to be
> + needed too late. */
Not sure I understand this. Do you have a testcase?
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 6:08 ` Richard Sandiford
@ 2004-07-08 7:41 ` Alexandre Oliva
2004-07-08 9:39 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 7:41 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 8, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Alexandre Oliva <aoliva@redhat.com> writes:
>> + - we would like 'D' to be be NO_REGS when the frame pointer isn't
>> + live, but we the frame pointer may turn out to be needed after
>> + we start reload, and then we may have already decided we don't
>> + have a choice, so we can't do that. Forcing the register
>> + allocator to use er6 if possible might produce better code for
>> + small functions: it's more efficient to save and restore er6 in
>> + the prologue & epilogue than to do it in a define_split.
>> + Hopefully disparaging 'D' will have a similar effect, without
>> + forcing a reload failure if the frame pointer is found to be
>> + needed too late. */
> Not sure I understand this. Do you have a testcase?
gcc.c-torture/execute/builtin-setjmp.c. It *still* fails at -O3
-fomit-frame-pointer, but not at lower optimization levels, which it
did before.
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 7:41 ` Alexandre Oliva
@ 2004-07-08 9:39 ` Richard Sandiford
2004-07-08 18:16 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-08 9:39 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
> gcc.c-torture/execute/builtin-setjmp.c. It *still* fails at -O3
> -fomit-frame-pointer, but not at lower optimization levels, which it
> did before.
Are you sure it's still needed? Is it possible that whatever was
causing the failure was fixed by another patch?
I tried the attached, both with and without the h8300.md bit,
and it didn't make any difference to the results for this testcase.
Like you say, -O3 -fomit-frame-pointer fails either way.
FWIW, the test pattern was h8300-sim{-msx}{,-mn}.
I just remember this making quite a big difference to quality of the
output, but it was over a year ago, so perhaps I'm misremembering,
or perhaps it doesn't make as much difference now.
Richard
Index: config/h8300/h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.290
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.290 h8300.c
--- config/h8300/h8300.c 8 Jul 2004 03:40:31 -0000 1.290
+++ config/h8300/h8300.c 8 Jul 2004 08:37:36 -0000
@@ -454,16 +454,12 @@ h8300_init_once (void)
before reload so that register allocator will pick the second
alternative.
- - we would like 'D' to be be NO_REGS when the frame pointer isn't
- live, but we the frame pointer may turn out to be needed after
- we start reload, and then we may have already decided we don't
- have a choice, so we can't do that. Forcing the register
- allocator to use er6 if possible might produce better code for
- small functions: it's more efficient to save and restore er6 in
- the prologue & epilogue than to do it in a define_split.
- Hopefully disparaging 'D' will have a similar effect, without
- forcing a reload failure if the frame pointer is found to be
- needed too late. */
+ - 'D' should be NO_REGS when the frame pointer isn't live.
+ The idea is to *make* it live by restricting the register allocator
+ to the first alternative. This isn't needed for correctness
+ but it produces better code for small functions: it's more
+ efficient to save and restore er6 in the prologue & epilogue
+ than to do it in a define_split. */
enum reg_class
h8300_reg_class_from_letter (int c)
@@ -484,8 +480,8 @@ h8300_reg_class_from_letter (int c)
return DESTINATION_REGS;
case 'D':
- /* The meaning of a constraint shouldn't change dynamically, so
- we can't make this NO_REGS. */
+ if (!regs_ever_live[FP_REG])
+ return NO_REGS;
return GENERAL_REGS;
case 'f':
@@ -3051,10 +3047,6 @@ h8300_swap_into_er6 (rtx addr)
{
push (HARD_FRAME_POINTER_REGNUM);
emit_move_insn (hard_frame_pointer_rtx, addr);
- if (REGNO (addr) == SP_REG)
- emit_move_insn (hard_frame_pointer_rtx,
- plus_constant (hard_frame_pointer_rtx,
- GET_MODE_SIZE (word_mode)));
}
/* Move the current value of er6 into ADDR and pop its old value
@@ -3063,8 +3055,7 @@ h8300_swap_into_er6 (rtx addr)
void
h8300_swap_out_of_er6 (rtx addr)
{
- if (REGNO (addr) != SP_REG)
- emit_move_insn (addr, hard_frame_pointer_rtx);
+ emit_move_insn (addr, hard_frame_pointer_rtx);
pop (HARD_FRAME_POINTER_REGNUM);
}
\f
Index: config/h8300/h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.286
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.286 h8300.md
--- config/h8300/h8300.md 8 Jul 2004 03:40:33 -0000 1.286
+++ config/h8300/h8300.md 8 Jul 2004 08:37:37 -0000
@@ -574,7 +574,7 @@ (define_insn "movmd_internal_normal"
(mem:BLK (match_operand:HI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
- (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:HI 0 "register_operand" "=d,!D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
@@ -591,7 +591,7 @@ (define_insn "movmd_internal"
(mem:BLK (match_operand:SI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
- (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:SI 0 "register_operand" "=d,!D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
@@ -702,7 +702,7 @@ (define_insn "stpcpy_internal_normal"
[(set (mem:BLK (match_operand:HI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:HI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
- (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:HI 0 "register_operand" "=d,!D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(clobber (match_operand:HI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && TARGET_NORMAL_MODE"
@@ -716,7 +716,7 @@ (define_insn "stpcpy_internal"
[(set (mem:BLK (match_operand:SI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:SI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
- (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
+ (clobber (match_operand:SI 0 "register_operand" "=d,!D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(clobber (match_operand:SI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && !TARGET_NORMAL_MODE"
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 18:16 ` Alexandre Oliva
@ 2004-07-08 18:16 ` Richard Sandiford
2004-07-08 20:23 ` Alexandre Oliva
2004-07-08 21:20 ` Alexandre Oliva
0 siblings, 2 replies; 32+ messages in thread
From: Richard Sandiford @ 2004-07-08 18:16 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
>> I tried the attached, both with and without the h8300.md bit,
>> and it didn't make any difference to the results for this testcase.
>> Like you say, -O3 -fomit-frame-pointer fails either way.
>
> Right. But lower optimization levels failed before the patch, and
> passed with it.
But my point is that the testcase passes at the other optimisation
levels even if the patch I attached is applied. (The patch just
reverts to the previous behaviour.)
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 9:39 ` Richard Sandiford
@ 2004-07-08 18:16 ` Alexandre Oliva
2004-07-08 18:16 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 18:16 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 8, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Alexandre Oliva <aoliva@redhat.com> writes:
>> gcc.c-torture/execute/builtin-setjmp.c. It *still* fails at -O3
>> -fomit-frame-pointer, but not at lower optimization levels, which it
>> did before.
> Are you sure it's still needed? Is it possible that whatever was
> causing the failure was fixed by another patch?
I don't think so.
> I tried the attached, both with and without the h8300.md bit,
> and it didn't make any difference to the results for this testcase.
> Like you say, -O3 -fomit-frame-pointer fails either way.
Right. But lower optimization levels failed before the patch, and
passed with it.
> I just remember this making quite a big difference to quality of the
> output
It would make a bigger difference if I hadn't changed the patterns
that used !D to use ??D instead.
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 2:01 ` Richard Henderson
2004-07-08 4:39 ` Alexandre Oliva
@ 2004-07-08 18:59 ` Alexandre Oliva
1 sibling, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 18:59 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches, rsandifo
[-- Attachment #1: Type: text/plain, Size: 409 bytes --]
On Jul 7, 2004, Richard Henderson <rth@redhat.com> wrote:
> On Wed, Jul 07, 2004 at 10:06:38PM -0300, Alexandre Oliva wrote:
>> How's this patchlet?
> Ok.
Rats, I'd simplified the decay of stpcpy to strcpy, but I failed to
realize that, if the builtin expansion failed, we'd still call
stpcpy. This patch reverts that bit. I'm checking it in. Sorry
about the breakage, and thanks for pointing it out.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: gcc-fix-decay-stpcpy2strcpy.patch --]
[-- Type: text/x-patch, Size: 947 bytes --]
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* builtins.c (expand_builtin_stpcpy): Un-simplify decay of stpcpy
to strcpy.
Index: gcc/builtins.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/builtins.c,v
retrieving revision 1.348
diff -u -p -r1.348 builtins.c
--- gcc/builtins.c 8 Jul 2004 03:40:29 -0000 1.348
+++ gcc/builtins.c 8 Jul 2004 17:06:04 -0000
@@ -3090,7 +3090,14 @@ expand_builtin_stpcpy (tree arglist, rtx
{
/* If return value is ignored, transform stpcpy into strcpy. */
if (target == const0_rtx)
- return expand_builtin_strcpy (arglist, target, mode);
+ {
+ tree fn = implicit_built_in_decls[BUILT_IN_STRCPY];
+ if (!fn)
+ return 0;
+
+ return expand_expr (build_function_call_expr (fn, arglist),
+ target, mode, EXPAND_NORMAL);
+ }
if (!validate_arglist (arglist, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
return 0;
[-- Attachment #3: Type: text/plain, Size: 188 bytes --]
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 18:16 ` Richard Sandiford
@ 2004-07-08 20:23 ` Alexandre Oliva
2004-07-12 20:14 ` Richard Sandiford
2004-07-08 21:20 ` Alexandre Oliva
1 sibling, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 20:23 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 8, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Alexandre Oliva <aoliva@redhat.com> writes:
>>> I tried the attached, both with and without the h8300.md bit,
>>> and it didn't make any difference to the results for this testcase.
>>> Like you say, -O3 -fomit-frame-pointer fails either way.
>>
>> Right. But lower optimization levels failed before the patch, and
>> passed with it.
> But my point is that the testcase passes at the other optimisation
> levels even if the patch I attached is applied. (The patch just
> reverts to the previous behaviour.)
Yeah. The previous behavior was broken for me. Maybe something
changed since then. I was actually fixing problems I ran into on a
3.4ish tree, so maybe the problems aren't there in 3.5. I don't think
they were actually fixed, though. Probably just hiding.
Maybe you can still get the problem with dg/builtin-apply2.c? I
remember it failed to compile because of some movmd-related problems.
After the changes, compilation succeeded, and we only had run-time
failures because the calling conventions defined by the ABI aren't
compatible with that __builtin_apply() expects.
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 18:16 ` Richard Sandiford
2004-07-08 20:23 ` Alexandre Oliva
@ 2004-07-08 21:20 ` Alexandre Oliva
1 sibling, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-08 21:20 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 8, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Alexandre Oliva <aoliva@redhat.com> writes:
>>> I tried the attached, both with and without the h8300.md bit,
>>> and it didn't make any difference to the results for this testcase.
>>> Like you say, -O3 -fomit-frame-pointer fails either way.
>>
>> Right. But lower optimization levels failed before the patch, and
>> passed with it.
> But my point is that the testcase passes at the other optimisation
> levels even if the patch I attached is applied.
Anyhow, whether the testcase passes with your patch or not is not very
relevant. Using !D at that point is wrong, for the reasons explained
in the comments.
! prevents reload from even considering an alternative. So, given
`d,!D', if it couldn't satisfy the constraint in local or global
alloc, it will require r6 (or, worse, NO_REGS, if `d' happens to
expand differently) during reload. NO_REGS will obviously be
impossible to satisfy, and r6 may be impossible to satisfy if the
frame pointer is found to be needed during reload (this happens in
builtin-apply2).
So we absolutely need another way to represent that. d,??D is
probably not it, because reload will sometimes still choose the first
alternative and die upon the impossibility of spilling r6 because the
frame pointer became needed.
I'm certainly open to change, but !D is not the way to go. It's wrong
in theory, even if in practice it appears to work. I.e., as the
compiler gets smarter, it will break.
I could think of a few solutions that were probably worth trying, but
I ran out of time before I could implement them:
- introduce another virtual register, and use that as an alternative
to `d', and then have a machine-dependent pass that `reloads' that
into r6 as needed.
- somehow give r6 a higher priority in being chosen to satisfy an `D'
constraint, and force `d' to match before reload.
- add another scratch register and hope it gets r6 if it's available
at all, and use that to save/restore r6 otherwise
- emit save r6, movmd with r6 referenced as an output hardware
register, copy r6 elsewhere, restore r6 explicitly, and then
optimize away the save and restore if it turns out that we got r6.
Must somehow make sure reload doesn't emit output reloads that
reference the modified r6. Yuck.
Yeah, not an easy problem :-(
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-08 20:23 ` Alexandre Oliva
@ 2004-07-12 20:14 ` Richard Sandiford
2004-07-14 12:49 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-12 20:14 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
> Maybe you can still get the problem with dg/builtin-apply2.c? I
> remember it failed to compile because of some movmd-related problems.
Thanks for the pointer. builtin-apply2.c does indeed fail without
your change.
It turns out that the problem was in:
if (!regs_ever_live[FP_REG])
return NO_REGS;
When I wrote the code, there was no such thing as HFP_REG, and FP_REG was 6.
As explained (poorly, I expect ;) in the comment above the function, the idea
was to return NO_REGS if er6 wasn't yet live. So with the new HFP_REG/FP_REG
distinction, the code should instead read:
if (!regs_ever_live[HFP_REG])
return NO_REGS;
FWIW, the patch below puts back the old code, but with the additional
FP_REG->HFP_REG change, and builtin-apply2.c now compiles.
> Anyhow, whether the testcase passes with your patch or not is not very
> relevant. Using !D at that point is wrong, for the reasons explained
> in the comments.
>
> ! prevents reload from even considering an alternative. So, given
> `d,!D', if it couldn't satisfy the constraint in local or global
> alloc, it will require r6 (or, worse, NO_REGS, if `d' happens to
> expand differently) during reload. NO_REGS will obviously be
> impossible to satisfy, and r6 may be impossible to satisfy if the
> frame pointer is found to be needed during reload (this happens in
> builtin-apply2).
See above for the builtin-apply2 bit. But wrt the first sentence,
the idea is precisely to prevent reload from considering the 'D'
alternative if er6 is an allocatable register. I.e., when the
instruction is being reloaded, there are two cases:
(a) er6 is allocatable. Then:
'd' maps to DESTINATION_REGS
'D' maps to GENERAL_REGS
but we absolutely want reload to pick the first alternative
if it can, even if that means spilling into and out of er6.
If it doesn't choose the first alternative, we have to spill
er6 ourselves anyway.
(b) er6 is not allocatable. Then:
'd' maps to NO_REGS
'D' maps to GENERAL_REGS
Reload will ignore the first alternative since, like you say,
NO_REGS can't be satisfied. It is forced to use the second
alternative instead.
The built-in-setjmp.c -O3 -fomit-frame-pointer failure (which, to remind
anyone else reading, is there with and without the patch below) does show
up a problem. And this might well be the problem you were trying to explain
above. (Sorry if so! I couldn't quite follow what you were saying.)
We have the following sequence of events, all in the main reload() loop:
1. We pick a set of reloads each instruction. In the case
of movmd, we pick DESTINATION_REGS (the class containing
only the frame pointer), since the frame pointer is still
allocatable at this point.
2. We discover that the function now needs a frame pointer.
3. We discover that the frame pointer was previously needed
as a spill register and that we must therefore recompute
the reloads (something_changed = 1).
4. We nevertheless proceed to select_reload_regs() for the old set
of reloads. This leads to the movmd spill failure since there
are no longer any allocatable registers in DESTINATION_REGS.
This probably shows my ignorance, but I wasn't planning on (4). I was
expecting the reload loop to repeat straight away once it realised that
the old reloads weren't viable. So it seems you just can't have a
register class that includes only the frame pointer.
As a proof of concept:
Index: reload1.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reload1.c,v
retrieving revision 1.441
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.441 reload1.c
*** reload1.c 9 Jul 2004 03:29:34 -0000 1.441
--- reload1.c 12 Jul 2004 13:32:01 -0000
*************** reload (rtx first, int global)
*** 1007,1012 ****
--- 1007,1014 ----
something_changed = 1;
}
}
+ if (something_changed)
+ continue;
select_reload_regs ();
if (failure)
bypasses select_reload_regs() when the set of eliminable registers
has changed. It fixes the testcase, but I doubt it's right. ;)
Richard
Index: config/h8300/h8300.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.c,v
retrieving revision 1.290
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.290 h8300.c
*** config/h8300/h8300.c 8 Jul 2004 03:40:31 -0000 1.290
--- config/h8300/h8300.c 9 Jul 2004 09:34:24 -0000
*************** h8300_init_once (void)
*** 454,469 ****
before reload so that register allocator will pick the second
alternative.
! - we would like 'D' to be be NO_REGS when the frame pointer isn't
! live, but we the frame pointer may turn out to be needed after
! we start reload, and then we may have already decided we don't
! have a choice, so we can't do that. Forcing the register
! allocator to use er6 if possible might produce better code for
! small functions: it's more efficient to save and restore er6 in
! the prologue & epilogue than to do it in a define_split.
! Hopefully disparaging 'D' will have a similar effect, without
! forcing a reload failure if the frame pointer is found to be
! needed too late. */
enum reg_class
h8300_reg_class_from_letter (int c)
--- 454,465 ----
before reload so that register allocator will pick the second
alternative.
! - 'D' should be NO_REGS when the frame pointer isn't live.
! The idea is to *make* it live by restricting the register allocator
! to the first alternative. This isn't needed for correctness
! but it produces better code for small functions: it's more
! efficient to save and restore er6 in the prologue & epilogue
! than to do it in a define_split. */
enum reg_class
h8300_reg_class_from_letter (int c)
*************** h8300_reg_class_from_letter (int c)
*** 484,491 ****
return DESTINATION_REGS;
case 'D':
! /* The meaning of a constraint shouldn't change dynamically, so
! we can't make this NO_REGS. */
return GENERAL_REGS;
case 'f':
--- 480,487 ----
return DESTINATION_REGS;
case 'D':
! if (!regs_ever_live[HFP_REG])
! return NO_REGS;
return GENERAL_REGS;
case 'f':
*************** h8300_swap_into_er6 (rtx addr)
*** 3051,3060 ****
{
push (HARD_FRAME_POINTER_REGNUM);
emit_move_insn (hard_frame_pointer_rtx, addr);
- if (REGNO (addr) == SP_REG)
- emit_move_insn (hard_frame_pointer_rtx,
- plus_constant (hard_frame_pointer_rtx,
- GET_MODE_SIZE (word_mode)));
}
/* Move the current value of er6 into ADDR and pop its old value
--- 3047,3052 ----
*************** h8300_swap_into_er6 (rtx addr)
*** 3063,3070 ****
void
h8300_swap_out_of_er6 (rtx addr)
{
! if (REGNO (addr) != SP_REG)
! emit_move_insn (addr, hard_frame_pointer_rtx);
pop (HARD_FRAME_POINTER_REGNUM);
}
\f
--- 3055,3061 ----
void
h8300_swap_out_of_er6 (rtx addr)
{
! emit_move_insn (addr, hard_frame_pointer_rtx);
pop (HARD_FRAME_POINTER_REGNUM);
}
\f
Index: config/h8300/h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.286
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.286 h8300.md
*** config/h8300/h8300.md 8 Jul 2004 03:40:33 -0000 1.286
--- config/h8300/h8300.md 9 Jul 2004 09:34:25 -0000
*************** (define_insn "movmd_internal_normal"
*** 574,580 ****
(mem:BLK (match_operand:HI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
! (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
--- 574,580 ----
(mem:BLK (match_operand:HI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
! (clobber (match_operand:HI 0 "register_operand" "=d,!D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
*************** (define_insn "movmd_internal"
*** 591,597 ****
(mem:BLK (match_operand:SI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
! (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
--- 591,597 ----
(mem:BLK (match_operand:SI 4 "register_operand" "1,1")))
(unspec [(match_operand:HI 5 "register_operand" "2,2")
(match_operand:HI 6 "const_int_operand" "n,n")] UNSPEC_MOVMD)
! (clobber (match_operand:SI 0 "register_operand" "=d,!D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(set (match_operand:HI 2 "register_operand" "=c,c")
(const_int 0))]
*************** (define_insn "stpcpy_internal_normal"
*** 702,708 ****
[(set (mem:BLK (match_operand:HI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:HI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
! (clobber (match_operand:HI 0 "register_operand" "=d,??D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(clobber (match_operand:HI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && TARGET_NORMAL_MODE"
--- 702,708 ----
[(set (mem:BLK (match_operand:HI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:HI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
! (clobber (match_operand:HI 0 "register_operand" "=d,!D"))
(clobber (match_operand:HI 1 "register_operand" "=f,f"))
(clobber (match_operand:HI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && TARGET_NORMAL_MODE"
*************** (define_insn "stpcpy_internal"
*** 716,722 ****
[(set (mem:BLK (match_operand:SI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:SI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
! (clobber (match_operand:SI 0 "register_operand" "=d,??D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(clobber (match_operand:SI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && !TARGET_NORMAL_MODE"
--- 716,722 ----
[(set (mem:BLK (match_operand:SI 3 "register_operand" "0,r"))
(unspec:BLK [(mem:BLK (match_operand:SI 4 "register_operand" "1,1"))]
UNSPEC_STPCPY))
! (clobber (match_operand:SI 0 "register_operand" "=d,!D"))
(clobber (match_operand:SI 1 "register_operand" "=f,f"))
(clobber (match_operand:SI 2 "register_operand" "=c,c"))]
"TARGET_H8300SX && !TARGET_NORMAL_MODE"
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-12 20:14 ` Richard Sandiford
@ 2004-07-14 12:49 ` Alexandre Oliva
2004-07-14 17:16 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-14 12:49 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 12, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> The built-in-setjmp.c -O3 -fomit-frame-pointer failure (which, to remind
> anyone else reading, is there with and without the patch below) does show
> up a problem. And this might well be the problem you were trying to explain
> above. (Sorry if so! I couldn't quite follow what you were saying.)
Yup, exactly the same problem.
> So it seems you just can't have a register class that includes only
> the frame pointer.
Yup.
> ! if (!regs_ever_live[HFP_REG])
> ! return NO_REGS;
I had both HFP_REG and FP_REG at some point. I thought this would
minimize the risk of running into the failure case. Don't you think
so?
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-14 12:49 ` Alexandre Oliva
@ 2004-07-14 17:16 ` Richard Sandiford
2004-07-15 4:11 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-14 17:16 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
>> ! if (!regs_ever_live[HFP_REG])
>> ! return NO_REGS;
>
> I had both HFP_REG and FP_REG at some point. I thought this would
> minimize the risk of running into the failure case. Don't you think
> so?
I wouldn't have thought checking for FP_REG was necessary. It really is
the liveness of er6 that we're concerned about. Perhaps DESTINATION_REG
would be more self-documenting than HFP_REG...
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-14 17:16 ` Richard Sandiford
@ 2004-07-15 4:11 ` Alexandre Oliva
2004-07-15 5:22 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-15 4:11 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 14, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Alexandre Oliva <aoliva@redhat.com> writes:
>>> ! if (!regs_ever_live[HFP_REG])
>>> ! return NO_REGS;
>>
>> I had both HFP_REG and FP_REG at some point. I thought this would
>> minimize the risk of running into the failure case. Don't you think
>> so?
> I wouldn't have thought checking for FP_REG was necessary. It really is
> the liveness of er6 that we're concerned about.
Then I totally misunderstand what's going on. I thought you were
testing whether the frame pointer was used, not whether there was some
random pseudo assigned to er6 by local or global. Which is it?
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-15 4:11 ` Alexandre Oliva
@ 2004-07-15 5:22 ` Richard Sandiford
2004-07-15 16:25 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-15 5:22 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
> On Jul 14, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
>> Alexandre Oliva <aoliva@redhat.com> writes:
>>>> ! if (!regs_ever_live[HFP_REG])
>>>> ! return NO_REGS;
>>>
>>> I had both HFP_REG and FP_REG at some point. I thought this would
>>> minimize the risk of running into the failure case. Don't you think
>>> so?
>
>> I wouldn't have thought checking for FP_REG was necessary. It really is
>> the liveness of er6 that we're concerned about.
>
> Then I totally misunderstand what's going on. I thought you were
> testing whether the frame pointer was used, not whether there was some
> random pseudo assigned to er6 by local or global. Which is it?
The idea is that, if nothing is using er6, there's no reason why it
can't be allocated for a movmd. The register allocators might normally
shy away from that because er6 is a call-saved register. "Hey, I've got
this call-clobbered register sitting free. Why not use that instead of
er6?". Even '!' wasn't enough to convince them otherwise.
[ And that's not surprising really. It's unusual to strongly prefer
a call-saved register over a call-clobbered when a pattern offers
both alternatives. ]
Of course, we don't have the same problem with er5 and er7 since we can
safely require 'f' and 'c' in all alternatives. er6 is the odd one out
because we have to offer a 'D' alternative as well.
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-15 5:22 ` Richard Sandiford
@ 2004-07-15 16:25 ` Alexandre Oliva
2004-07-15 17:14 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-15 16:25 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 14, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> The idea is that, if nothing is using er6, there's no reason why it
> can't be allocated for a movmd.
Right. The trick is to figure out whether something *is* using it.
HFP_REG and FP_REG both refer to er6, although the latter does so by
means of elimination. That's why I thought it might make sense to
test for both. Before HFP_REG and FP_REG were split, when we tested
for FP_REG, we covered both meanings. After the split, in order to
preserve behavior, we had to test both. That was my reasoning. Was
it wrong?
> The register allocators might normally shy away from that because
> er6 is a call-saved register. "Hey, I've got this call-clobbered
> register sitting free. Why not use that instead of er6?". Even '!'
> wasn't enough to convince them otherwise.
There's also effects from the REG_ALLOC_ORDER. But getting the
allocator to prefer er6 over any other register would probably end up
getting far worse results if it turns out that we need a frame
pointer.
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-15 16:25 ` Alexandre Oliva
@ 2004-07-15 17:14 ` Richard Sandiford
2004-07-15 17:25 ` Richard Sandiford
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-15 17:14 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Alexandre Oliva <aoliva@redhat.com> writes:
> On Jul 14, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
>> The idea is that, if nothing is using er6, there's no reason why it
>> can't be allocated for a movmd.
>
> Right. The trick is to figure out whether something *is* using it.
"*is*" (present tense) is exactly right. ;) And regs_ever_live[6]
tells you just that. There's no need to look elsewhere.
> HFP_REG and FP_REG both refer to er6, although the latter does so by
> means of elimination. That's why I thought it might make sense to
> test for both. Before HFP_REG and FP_REG were split, when we tested
> for FP_REG, we covered both meanings. After the split, in order to
> preserve behavior, we had to test both. That was my reasoning. Was
> it wrong?
Well, as far as I can tell, yes. At least as far as what this code
is trying to do.
The fact that FP_REG can be eliminated to HFP_REG is pretty much
irrelevent here. If we haven't yet committed to an HFP_REG->FP_REG
elimination, then er6 will still be available for general register
allocation (regs_ever_live[6] == 0). And we want to force the
register allocator to use er6 in that case, even if er6 would
normally have seemed too expensive.
If it later turns out that we _do_ need a hard frame pointer, then
obviously the old uses of er6 will have to be reallocated. But that's
just normal behaviour when FRAME_POINTER_REGNUM isn't a fixed register.
It's not specific to the d/D games.
And the same thing was true in the old code too. The fact that
{HARD_,}FRAME_POINTER_REGNUM were 6 did not cause regs_ever_live[6]
to be true until we knew for certain that the frame pointer couldn't
be eliminated.
>> The register allocators might normally shy away from that because
>> er6 is a call-saved register. "Hey, I've got this call-clobbered
>> register sitting free. Why not use that instead of er6?". Even '!'
>> wasn't enough to convince them otherwise.
>
> There's also effects from the REG_ALLOC_ORDER. But getting the
> allocator to prefer er6 over any other register would probably end up
> getting far worse results if it turns out that we need a frame
> pointer.
Right.
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-15 17:14 ` Richard Sandiford
@ 2004-07-15 17:25 ` Richard Sandiford
2004-07-15 22:23 ` Alexandre Oliva
0 siblings, 1 reply; 32+ messages in thread
From: Richard Sandiford @ 2004-07-15 17:25 UTC (permalink / raw)
To: Alexandre Oliva; +Cc: Kazu Hirata, gcc-patches
Sorry, I'm getting my 'H's mixed up...
Richard Sandiford <rsandifo@redhat.com> writes:
> The fact that FP_REG can be eliminated to HFP_REG is pretty much
> irrelevent here. If we haven't yet committed to an HFP_REG->FP_REG
^^^^^^^^^^^^^^^
FP_REG->HFP_REG.
> If it later turns out that we _do_ need a hard frame pointer, then
> obviously the old uses of er6 will have to be reallocated. But that's
> just normal behaviour when FRAME_POINTER_REGNUM isn't a fixed register.
^^^^^^^^^^^^^^^^^^^^
HARD_FRAME_POINTER_REGNUM.
Richard
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: add h8sx support to h8300
2004-07-15 17:25 ` Richard Sandiford
@ 2004-07-15 22:23 ` Alexandre Oliva
0 siblings, 0 replies; 32+ messages in thread
From: Alexandre Oliva @ 2004-07-15 22:23 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Kazu Hirata, gcc-patches
On Jul 15, 2004, Richard Sandiford <rsandifo@redhat.com> wrote:
> Sorry, I'm getting my 'H's mixed up...
Glad I'm not the only one who does that :-)
> And the same thing was true in the old code too. The fact that
> {HARD_,}FRAME_POINTER_REGNUM were 6 did not cause regs_ever_live[6]
> to be true until we knew for certain that the frame pointer couldn't
> be eliminated.
Aha, I didn't realize that.
No objections to the patch, then. It's just as broken as my alternate
implementation, and if it generates better code when it works, fine
with me.
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2004-07-15 18:05 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2004-06-21 14:24 add h8sx support to h8300 Alexandre Oliva
2004-06-21 17:12 ` Kazu Hirata
2004-06-23 2:23 ` Alexandre Oliva
2004-07-07 22:11 ` Alexandre Oliva
2004-07-08 6:08 ` Richard Sandiford
2004-07-08 7:41 ` Alexandre Oliva
2004-07-08 9:39 ` Richard Sandiford
2004-07-08 18:16 ` Alexandre Oliva
2004-07-08 18:16 ` Richard Sandiford
2004-07-08 20:23 ` Alexandre Oliva
2004-07-12 20:14 ` Richard Sandiford
2004-07-14 12:49 ` Alexandre Oliva
2004-07-14 17:16 ` Richard Sandiford
2004-07-15 4:11 ` Alexandre Oliva
2004-07-15 5:22 ` Richard Sandiford
2004-07-15 16:25 ` Alexandre Oliva
2004-07-15 17:14 ` Richard Sandiford
2004-07-15 17:25 ` Richard Sandiford
2004-07-15 22:23 ` Alexandre Oliva
2004-07-08 21:20 ` Alexandre Oliva
2004-07-06 20:56 ` Alexandre Oliva
2004-07-07 2:37 ` Richard Henderson
2004-07-07 7:06 ` Alexandre Oliva
2004-07-07 9:06 ` Richard Henderson
2004-07-08 0:14 ` Alexandre Oliva
2004-07-08 1:22 ` Richard Henderson
2004-07-08 1:26 ` Alexandre Oliva
2004-07-08 2:01 ` Richard Henderson
2004-07-08 4:39 ` Alexandre Oliva
2004-07-08 18:59 ` Alexandre Oliva
2004-07-07 9:13 ` Joseph S. Myers
2004-07-07 19:44 ` Alexandre Oliva
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