From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp-out1.suse.de (smtp-out1.suse.de [IPv6:2a07:de40:b251:101:10:150:64:1]) by sourceware.org (Postfix) with ESMTPS id C2DF7385DC2F for ; Tue, 19 Dec 2023 10:12:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C2DF7385DC2F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=suse.de ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C2DF7385DC2F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a07:de40:b251:101:10:150:64:1 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702980756; cv=none; b=sgf1adFIJZNRMFM6Z7ca8BYIbXo0aZg9ux2oyMFtBcR4am4gSFaHPL2DQXeS2ouhLjxj8ffglvlhxZ8KYubmbwZeBSuSBX+9Wzx0txhonfF+focQCMC16tY8HdWhdL97QUc7v94omoecMCR4SYSAKbYIAnHvqt1/zt3gF5Zixig= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702980756; c=relaxed/simple; bh=jQthbk2fki8sDUS/KMLnXosaBTAA4yPXy8aQBQ6aa0Q=; h=DKIM-Signature:DKIM-Signature:DKIM-Signature:DKIM-Signature:Date: From:To:Subject:Message-ID:MIME-Version; b=E4mRRkreAEgYEW7MnQym00+S0UTTG0gQtNHZsvDnaxKgaV8cMXFWzYQjcHLuUoRxF4N1/0Duk6WeGHB5fSqCN77bGih7chH48/KACoQ7n508JlUQDocQg8C0ufHvEWrghHiwC+L+G64Mpn/54WuZkOC7+m0cTgiXFLERl8VCXcs= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [10.168.4.150] (unknown [10.168.4.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 689E322289; Tue, 19 Dec 2023 10:12:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1702980753; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=x6vsuNjVje51uJuCMt+yvS8e0zhPeSYYF67vR7P4M64=; b=bDFBP0n7qn+Ex+OrYf7xp1naBt4e+XfRnswiV+VxtTP6AaTGVTIvEvyvI4Oy+1EOtRBAwb yf9WxmHjJJBJQj66vQ8p1CmfSUhgVq6LwUQju3zB8GFlyIwwC1BNWLkT/hoOwhasHffj6V drnVqf8uVeqa80pEqnE5M3+ufP7IWog= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1702980753; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=x6vsuNjVje51uJuCMt+yvS8e0zhPeSYYF67vR7P4M64=; b=gO0D9KPfHN03Xwb9zukjrdpHff/Xo/DCm1Q8uKyyaGoK1ZjEuMdvNqpHZmyC1KGe38MXOX Qe/srgduPRHOc9CA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1702980753; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=x6vsuNjVje51uJuCMt+yvS8e0zhPeSYYF67vR7P4M64=; b=bDFBP0n7qn+Ex+OrYf7xp1naBt4e+XfRnswiV+VxtTP6AaTGVTIvEvyvI4Oy+1EOtRBAwb yf9WxmHjJJBJQj66vQ8p1CmfSUhgVq6LwUQju3zB8GFlyIwwC1BNWLkT/hoOwhasHffj6V drnVqf8uVeqa80pEqnE5M3+ufP7IWog= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1702980753; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=x6vsuNjVje51uJuCMt+yvS8e0zhPeSYYF67vR7P4M64=; b=gO0D9KPfHN03Xwb9zukjrdpHff/Xo/DCm1Q8uKyyaGoK1ZjEuMdvNqpHZmyC1KGe38MXOX Qe/srgduPRHOc9CA== Date: Tue, 19 Dec 2023 11:11:22 +0100 (CET) From: Richard Biener To: "juzhe.zhong@rivai.ai" cc: Robin Dapp , gcc-patches , "pan2.li" , "richard.sandiford" , Richard Biener , pinskia Subject: Re: Re: [PATCH] fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971]. In-Reply-To: <6FD0A43E2F3E9BD9+202312191735136921653@rivai.ai> Message-ID: References: , <097AABD6596FB0C3+2023121906491281154423@rivai.ai>, <92p02r8p-46rq-s976-5r8p-s87q0q763465@fhfr.qr>, , <6FD0A43E2F3E9BD9+202312191735136921653@rivai.ai> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Level: X-Spam-Level: X-Spamd-Result: default: False [-1.60 / 50.00]; TO_DN_EQ_ADDR_SOME(0.00)[]; TO_DN_SOME(0.00)[]; RCPT_COUNT_SEVEN(0.00)[7]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; BAYES_HAM(-3.00)[100.00%]; ARC_NA(0.00)[]; FROM_HAS_DN(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[]; MIME_GOOD(-0.10)[text/plain]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,gcc.target:url,rivai.ai:email]; FUZZY_BLOCKED(0.00)[rspamd.com]; FREEMAIL_CC(0.00)[gmail.com,gcc.gnu.org,intel.com,arm.com]; SUSPICIOUS_RECIPS(1.50)[] Authentication-Results: smtp-out1.suse.de; none X-Spam-Score: -1.60 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, 19 Dec 2023, juzhe.zhong@rivai.ai wrote: > Hi, Richard. > > After investigating the codes: > /* Return true if EXPR is the integer constant zero or a complex constant > of zero, or a location wrapper for such a constant. */ > > bool > integer_zerop (const_tree expr) > { > STRIP_ANY_LOCATION_WRAPPER (expr); > > switch (TREE_CODE (expr)) > { > case INTEGER_CST: > return wi::to_wide (expr) == 0; > case COMPLEX_CST: > return (integer_zerop (TREE_REALPART (expr)) > && integer_zerop (TREE_IMAGPART (expr))); > case VECTOR_CST: > return (VECTOR_CST_NPATTERNS (expr) == 1 > && VECTOR_CST_DUPLICATE_P (expr) > && integer_zerop (VECTOR_CST_ENCODED_ELT (expr, 0))); > default: > return false; > } > } > > I wonder whether we can simplify the codes as follows :? > if (integer_zerop (arg1) || integer_zerop (arg2)) > step_ok_p = (code == BIT_AND_EXPR || code == BIT_IOR_EXPR > || code == BIT_XOR_EXPR); Possibly. I'll let Richard S. comment on the whole structure. Richard. > > > > juzhe.zhong@rivai.ai > > From: Richard Biener > Date: 2023-12-19 17:12 > To: juzhe.zhong@rivai.ai > CC: Robin Dapp; gcc-patches; pan2.li; richard.sandiford; Richard Biener; pinskia > Subject: Re: Re: [PATCH] fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971]. > On Tue, 19 Dec 2023, juzhe.zhong@rivai.ai wrote: > > > Hi?Richard. Do you mean add the check as follows ? > > > > if (VECTOR_CST_NELTS_PER_PATTERN (arg1) == 1 > > && VECTOR_CST_NELTS_PER_PATTERN (arg2) == 3 > > Or <= 3 which would allow combining. As said, not sure what > == 2 would be and whether that would work. > > Btw, integer_allonesp should also allow to be optimized for > and/ior at least. Possibly IOR/AND with the sign bit for > signed elements as well. > > I wonder if there's a programmatic way to identify OK cases > rather than enumerating them. > > > && integer_zerop (VECTOR_CST_ELT (arg1, 0))) > > step_ok_p = (code == BIT_AND_EXPR || code == BIT_IOR_EXPR > > || code == BIT_XOR_EXPR); > > else if (VECTOR_CST_NELTS_PER_PATTERN (arg2) == 1 > > && VECTOR_CST_NELTS_PER_PATTERN (arg1) == 3 > > && integer_zerop (VECTOR_CST_ELT (arg2, 0))) > > step_ok_p = (code == BIT_AND_EXPR || code == BIT_IOR_EXPR > > || code == BIT_XOR_EXPR); > > > > > > > > juzhe.zhong@rivai.ai > > > > From: Richard Biener > > Date: 2023-12-19 16:15 > > To: ??? > > CC: rdapp.gcc; gcc-patches; pan2.li; richard.sandiford; richard.guenther; Andrew Pinski > > Subject: Re: [PATCH] fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971]. > > On Tue, 19 Dec 2023, ??? wrote: > > > > > Thanks Robin send initial patch to fix this ICE bug. > > > > > > CC to Richard S, Richard B, and Andrew. > > > > Just one comment, it seems that VECTOR_CST_STEPPED_P should > > implicitly include VECTOR_CST_DUPLICATE_P since it would be > > a step of zero (but as implemented it doesn't catch this). > > Looking at the implementation it's odd that we can handle > > VECTOR_CST_NELTS_PER_PATTERN == 1 (duplicate) and > > == 3 (stepped) but not == 2 (not sure what that would be). > > > > Maybe the tests can be re-formulated in terms of > > VECTOR_CST_NELTS_PER_PATTERN? > > > > Richard. > > > > > Thanks. > > > > > > > > > > > > juzhe.zhong@rivai.ai > > > > > > From: Robin Dapp > > > Date: 2023-12-19 03:50 > > > To: gcc-patches > > > CC: rdapp.gcc; Li, Pan2; juzhe.zhong@rivai.ai > > > Subject: [PATCH] fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971]. > > > Hi, > > > > > > found in PR112971, this patch adds folding support for bitwise operations > > > of const duplicate zero vectors and stepped vectors. > > > On riscv we have the situation that a folding would perpetually continue > > > without simplifying because e.g. {0, 0, 0, ...} & {7, 6, 5, ...} would > > > not fold to {0, 0, 0, ...}. > > > > > > Bootstrapped and regtested on x86 and aarch64, regtested on riscv. > > > > > > I won't be available to respond quickly until next year. Pan or Juzhe, > > > as discussed, feel free to continue with possible revisions. > > > > > > Regards > > > Robin > > > > > > > > > gcc/ChangeLog: > > > > > > PR middle-end/112971 > > > > > > * fold-const.cc (const_binop): Handle > > > zerop@1 AND/IOR/XOR VECT_CST_STEPPED_P@2 > > > > > > gcc/testsuite/ChangeLog: > > > > > > * gcc.target/riscv/rvv/autovec/pr112971.c: New test. > > > --- > > > gcc/fold-const.cc | 14 +++++++++++++- > > > .../gcc.target/riscv/rvv/autovec/pr112971.c | 18 ++++++++++++++++++ > > > 2 files changed, 31 insertions(+), 1 deletion(-) > > > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112971.c > > > > > > diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc > > > index f5d68ac323a..43ed097bf5c 100644 > > > --- a/gcc/fold-const.cc > > > +++ b/gcc/fold-const.cc > > > @@ -1653,8 +1653,20 @@ const_binop (enum tree_code code, tree arg1, tree arg2) > > > { > > > tree type = TREE_TYPE (arg1); > > > bool step_ok_p; > > > + > > > + /* AND, IOR as well as XOR with a zerop can be handled directly. */ > > > if (VECTOR_CST_STEPPED_P (arg1) > > > - && VECTOR_CST_STEPPED_P (arg2)) > > > + && VECTOR_CST_DUPLICATE_P (arg2) > > > + && integer_zerop (VECTOR_CST_ELT (arg2, 0))) > > > + step_ok_p = code == BIT_AND_EXPR || code == BIT_IOR_EXPR > > > + || code == BIT_XOR_EXPR; > > > + else if (VECTOR_CST_STEPPED_P (arg2) > > > + && VECTOR_CST_DUPLICATE_P (arg1) > > > + && integer_zerop (VECTOR_CST_ELT (arg1, 0))) > > > + step_ok_p = code == BIT_AND_EXPR || code == BIT_IOR_EXPR > > > + || code == BIT_XOR_EXPR; > > > + else if (VECTOR_CST_STEPPED_P (arg1) > > > + && VECTOR_CST_STEPPED_P (arg2)) > > > /* We can operate directly on the encoding if: > > > a3 - a2 == a2 - a1 && b3 - b2 == b2 - b1 > > > diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112971.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112971.c > > > new file mode 100644 > > > index 00000000000..816ebd3c493 > > > --- /dev/null > > > +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112971.c > > > @@ -0,0 +1,18 @@ > > > +/* { dg-do compile } */ > > > +/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3 -fno-vect-cost-model" } */ > > > + > > > +int a; > > > +short b[9]; > > > +char c, d; > > > +void e() { > > > + d = 0; > > > + for (;; d++) { > > > + if (b[d]) > > > + break; > > > + a = 8; > > > + for (; a >= 0; a--) { > > > + char *f = &c; > > > + *f &= d == (a & d); > > > + } > > > + } > > > +} > > > > > > > > > -- Richard Biener SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg, Germany; GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)