* Committed patch to move MIPS comment
@ 2002-11-05 4:50 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2002-11-05 4:50 UTC (permalink / raw)
To: gcc-patches
Minor patch to move&update the cannot-change-mode comment.
Committed as obvious.
Richard
* config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Move comment to...
* config/mips/mips.c (mips_cannot_change_mode_class): ...here.
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.226
diff -c -d -p -F^[(a-zA-Z0-9_^#] -r1.226 mips.h
*** config/mips/mips.h 4 Nov 2002 16:57:06 -0000 1.226
--- config/mips/mips.h 5 Nov 2002 12:37:36 -0000
*************** #define SECONDARY_OUTPUT_RELOAD_CLASS(CL
*** 2326,2348 ****
#define CLASS_MAX_NREGS(CLASS, MODE) mips_class_max_nregs (CLASS, MODE)
- /* If defined, gives a class of registers that cannot be used as the
- operand of a SUBREG that changes the mode of the object illegally.
-
- In little-endian mode, the hi-lo registers are numbered backwards,
- so (subreg:SI (reg:DI hi) 0) gets the high word instead of the low
- word as intended.
-
- Similarly, when using paired floating-point registers, the first
- register holds the low word, regardless of endianness. So in big
- endian mode, (subreg:SI (reg:DF $f0) 0) does not get the high word
- as intended.
-
- Also, loading a 32-bit value into a 64-bit floating-point register
- will not sign-extend the value, despite what LOAD_EXTEND_OP says.
- We can't allow 64-bit float registers to change from a 32-bit
- mode to a 64-bit mode. */
-
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO) \
mips_cannot_change_mode_class (FROM, TO)
\f
--- 2326,2331 ----
Index: config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.239
diff -c -d -p -F^[(a-zA-Z0-9_^#] -r1.239 mips.c
*** config/mips/mips.c 4 Nov 2002 16:57:06 -0000 1.239
--- config/mips/mips.c 5 Nov 2002 12:37:36 -0000
*************** function_arg_pass_by_reference (cum, mod
*** 8400,8406 ****
}
/* Return the class of registers for which a mode change from FROM to TO
! is invalid. */
enum reg_class
mips_cannot_change_mode_class (from, to)
enum machine_mode from, to;
--- 8400,8421 ----
}
/* Return the class of registers for which a mode change from FROM to TO
! is invalid.
!
! In little-endian mode, the hi-lo registers are numbered backwards,
! so (subreg:SI (reg:DI hi) 0) gets the high word instead of the low
! word as intended.
!
! Similarly, when using paired floating-point registers, the first
! register holds the low word, regardless of endianness. So in big
! endian mode, (subreg:SI (reg:DF $f0) 0) does not get the high word
! as intended.
!
! Also, loading a 32-bit value into a 64-bit floating-point register
! will not sign-extend the value, despite what LOAD_EXTEND_OP says.
! We can't allow 64-bit float registers to change from a 32-bit
! mode to a 64-bit mode. */
!
enum reg_class
mips_cannot_change_mode_class (from, to)
enum machine_mode from, to;
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2002-11-05 4:50 Committed patch to move MIPS comment Richard Sandiford
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