From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7085 invoked by alias); 3 Jun 2011 17:39:24 -0000 Received: (qmail 7071 invoked by uid 22791); 3 Jun 2011 17:39:23 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,TW_MX,TW_TM,TW_XC,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from snape.CeBiTec.Uni-Bielefeld.DE (HELO smtp-relay.CeBiTec.Uni-Bielefeld.DE) (129.70.160.84) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 03 Jun 2011 17:39:06 +0000 Received: from localhost (localhost.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) by smtp-relay.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTP id 3B555E87; Fri, 3 Jun 2011 19:39:05 +0200 (CEST) Received: from smtp-relay.CeBiTec.Uni-Bielefeld.DE ([127.0.0.1]) by localhost (malfoy.CeBiTec.Uni-Bielefeld.DE [127.0.0.1]) (amavisd-new, port 10024) with LMTP id aPLIyR12Fg9k; Fri, 3 Jun 2011 19:39:02 +0200 (CEST) Received: from manam.CeBiTec.Uni-Bielefeld.DE (manam.CeBiTec.Uni-Bielefeld.DE [129.70.161.120]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp-relay.CeBiTec.Uni-Bielefeld.DE (Postfix) with ESMTPS id 02DBFE86; Fri, 3 Jun 2011 19:39:02 +0200 (CEST) Received: (from ro@localhost) by manam.CeBiTec.Uni-Bielefeld.DE (8.14.4+Sun/8.14.4/Submit) id p53Hd1PY002150; Fri, 3 Jun 2011 19:39:01 +0200 (MEST) From: Rainer Orth To: Richard Henderson Cc: Uros Bizjak , gcc-patches@gcc.gnu.org, fortran@gcc.gnu.org Subject: Re: Use i386/crtfastmath.c on Solaris 2/x86 References: <4DE675B4.5040801@redhat.com> Date: Fri, 03 Jun 2011 17:39:00 -0000 In-Reply-To: <4DE675B4.5040801@redhat.com> (Richard Henderson's message of "Wed, 01 Jun 2011 10:24:04 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (usg-unix-v) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-06/txt/msg00259.txt.bz2 Richard Henderson writes: > On 06/01/2011 07:51 AM, Rainer Orth wrote: >> + /* Set PC to the instruction after the faulting one to skip over it, >> + otherwise we enter an infinite loop. 4 is the size of the stmxcsr >> + instruction. */ > ... >> + /* We need a single SSE instruction here so the handler can safely skip >> + over it. */ >> + __asm__ volatile ("movss %xmm2,%xmm1"); > > The comment referencing stmxcsr doesn't match the movss code. > It's still a 4 byte opcode, so the code still works. > > I do wonder if using "movaps %xmm0,%xmm0" might be cleaner, > to avoid clobbering a register, even if that register is > surely dead anyway. That's a 3 byte opcode though, so the > handler would need updating. Here's what I installed after regtesting completed on i386-pc-solaris2.{8, 11}. Thanks. Rainer 2011-06-02 Richard Henderson Rainer Orth gcc: * config/i386/crtfastmath.c [!__x86_64__ && __sun__ && __svr4__] (sigill_hdlr): Correct insn, insn size. (set_fast_math) [!__x86_64__ && __sun__ && __svr4__]: Use movaps. gcc/testsuite: * lib/target-supports.exp (check_sse_os_support_available): Use movaps. libgfortran. * config/fpu-387.h [__sun__ && __svr4__] (sigill_hdlr): Correct insn, insn size. (has_sse) [!__x86_64__ && __sun__ && __svr4__]: Use movaps. diff --git a/gcc/config/i386/crtfastmath.c b/gcc/config/i386/crtfastmath.c --- a/gcc/config/i386/crtfastmath.c +++ b/gcc/config/i386/crtfastmath.c @@ -30,7 +30,7 @@ #include "cpuid.h" #endif -#if !defined __x86_64 && defined __sun__ && defined __svr4__ +#if !defined __x86_64__ && defined __sun__ && defined __svr4__ #include #include @@ -43,9 +43,9 @@ sigill_hdlr (int sig __attribute((unused { sigill_caught = 1; /* Set PC to the instruction after the faulting one to skip over it, - otherwise we enter an infinite loop. 4 is the size of the stmxcsr + otherwise we enter an infinite loop. 3 is the size of the movaps instruction. */ - ucp->uc_mcontext.gregs[EIP] += 4; + ucp->uc_mcontext.gregs[EIP] += 3; setcontext (ucp); } #endif @@ -83,7 +83,7 @@ set_fast_math (void) /* We need a single SSE instruction here so the handler can safely skip over it. */ - __asm__ volatile ("movss %xmm2,%xmm1"); + __asm__ volatile ("movaps %xmm0,%xmm0"); sigaction (SIGILL, &oact, NULL); diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1059,7 +1059,7 @@ proc check_sse_os_support_available { } check_runtime_nocache sse_os_support_available { int main () { - __asm__ volatile ("movss %xmm2,%xmm1"); + __asm__ volatile ("movaps %xmm0,%xmm0"); return 0; } } "-msse" diff --git a/libgfortran/config/fpu-387.h b/libgfortran/config/fpu-387.h --- a/libgfortran/config/fpu-387.h +++ b/libgfortran/config/fpu-387.h @@ -1,5 +1,5 @@ /* FPU-related code for x86 and x86_64 processors. - Copyright 2005, 2007, 2009, 2010 Free Software Foundation, Inc. + Copyright 2005, 2007, 2009, 2010, 2011 Free Software Foundation, Inc. Contributed by Francois-Xavier Coudert This file is part of the GNU Fortran 95 runtime library (libgfortran). @@ -40,9 +40,9 @@ sigill_hdlr (int sig __attribute((unused { sigill_caught = 1; /* Set PC to the instruction after the faulting one to skip over it, - otherwise we enter an infinite loop. 4 is the size of the stmxcsr + otherwise we enter an infinite loop. 3 is the size of the movaps instruction. */ - ucp->uc_mcontext.gregs[EIP] += 4; + ucp->uc_mcontext.gregs[EIP] += 3; setcontext (ucp); } #endif @@ -73,7 +73,7 @@ has_sse (void) /* We need a single SSE instruction here so the handler can safely skip over it. */ - __asm__ volatile ("movss %xmm2,%xmm1"); + __asm__ volatile ("movaps %xmm0,%xmm0"); sigaction (SIGILL, &oact, NULL); -- ----------------------------------------------------------------------------- Rainer Orth, Center for Biotechnology, Bielefeld University