Re: target/6142: sil, dil, spl, bpl are being used in ia32 compiles

[jakub@gcc.gnu.org]

Synopsis: sil, dil, spl, bpl are being used in ia32 compiles

State-Changed-From-To: open->analyzed
State-Changed-By: jakub
State-Changed-When: Wed Apr  3 10:01:49 2002
State-Changed-Why:
    Reduced into:
    /* { dg-options "-O2 -frename-registers" } */
    
    typedef union {
      struct { unsigned char l, h; } b;
      unsigned int d;
    } A;
    typedef struct {
      A b0, b1, b2, b3, b4, b5;
    } B;
    
    static B b;
    extern unsigned char *x;
    unsigned int y;
    unsigned char foo (unsigned int);
    
    static inline
    unsigned short bar (void)
    {
      unsigned short w;
    
      w = x [b.b0.d & y];
      b.b0.b.l++;
      w += x [b.b0.d & y] << 8;
      b.b0.b.l++;
      return w;
    }
    
    static inline unsigned char
    baz (unsigned int a)
    {
      return foo (a);
    }
    
    void __attribute__ ((noinline))
    die (int x)
    {
      switch (x)
      {
        default:
          b.b5.d = bar ();
          break;
        case 0:
          __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l)
                   : "r" (b.b2.b.h), "0" (b.b1.b.h));
          break;
        case 2:
          __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l)
                   : "r" (b.b3.b.h), "0" (b.b1.b.h));
          break;
        case 5:
          __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l)
                   : "r" (b.b4.b.l), "0" (b.b1.b.h));
          break;
        case 6:
          __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l)
                   : "r" (baz (b.b4.d)), "0" (b.b1.b.h));
          break;
      }
    }
    
    int main (void)
    {
      die (6);
      return 0;
    }
    
    The problem is in -frename-registers which decides to put
    what was formely in %al into %sil.

http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=6142