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From: rth@gcc.gnu.org
To: gcc-bugs@gcc.gnu.org, gcc-prs@gcc.gnu.org, nobody@gcc.gnu.org,
	tmwg@inxservices.com
Subject: Re: optimization/6469: 3.1 ICE no register to spill in glibc 2.2.5 >-fschedule-insns
Date: Thu, 25 Apr 2002 22:58:00 -0000	[thread overview]
Message-ID: <20020426055846.18602.qmail@sources.redhat.com> (raw)

Synopsis: 3.1 ICE no register to spill in glibc 2.2.5 >-fschedule-insns

State-Changed-From-To: open->analyzed
State-Changed-By: rth
State-Changed-When: Thu Apr 25 22:58:46 2002
State-Changed-Why:
    You know, there *is* a reason why sched1 is disabled by default on x86.
    I'm tempted to close the PR outright without even looking at
    it, but I won't.

http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=6469


             reply	other threads:[~2002-04-26  5:58 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-04-25 22:58 rth [this message]
2003-05-10  3:16 Dara Hazeghi
2003-05-10  7:39 giovannibajo

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