From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30753 invoked by alias); 22 Oct 2002 17:06:02 -0000 Mailing-List: contact gcc-prs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-prs-owner@gcc.gnu.org Received: (qmail 30737 invoked by uid 71); 22 Oct 2002 17:06:02 -0000 Date: Tue, 22 Oct 2002 10:06:00 -0000 Message-ID: <20021022170602.30736.qmail@sources.redhat.com> To: nobody@gcc.gnu.org Cc: gcc-prs@gcc.gnu.org, From: =?iso-8859-1?Q?Tom=E1s_Palmer?= Subject: RE: target/8272: Unrecognized x86 instructions Reply-To: =?iso-8859-1?Q?Tom=E1s_Palmer?= X-SW-Source: 2002-10/txt/msg00819.txt.bz2 List-Id: The following reply was made to PR target/8272; it has been noted by GNATS. From: =?iso-8859-1?Q?Tom=E1s_Palmer?= To: "'rth@gcc.gnu.org'" , "'gcc-bugs@gcc.gnu.org'" , "'gcc-prs@gcc.gnu.org'" , "'nobody@gcc.gnu.org'" , =?iso-8859-1?Q?Tom=E1s_Pa?= =?iso-8859-1?Q?lmer?= , "'gcc-gnats@gcc.gnu.org'" Cc: Subject: RE: target/8272: Unrecognized x86 instructions Date: Tue, 22 Oct 2002 09:58:51 -0700 This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. ------_=_NextPart_001_01C279EC.4BF69850 Content-Type: text/plain; charset="iso-8859-1" I disagree. While I might buy that it is the fact that the default of the compiler is 386 on an Intel86 platform rather than 486+ might prevent these specific instructions. I am checking out that theory today now that I have documents for Gcc. The ASM instructions are correct as sent to you and assemble in-line with both Microsoft,Intel and other compilers in both Intel and ATT format. If my theory about the cpu flag does not address this issue then I am re-filing this bug and hope it gets assigned to someone with some ability to properly verify a test scenario rather than just guess. -----Original Message----- From: rth@gcc.gnu.org [mailto:rth@gcc.gnu.org] Sent: Tuesday, October 22, 2002 12:06 AM To: gcc-bugs@gcc.gnu.org; gcc-prs@gcc.gnu.org; nobody@gcc.gnu.org; tpalmer@widevine.com Subject: Re: target/8272: Unrecognized x86 instructions Synopsis: Unrecognized x86 instructions State-Changed-From-To: open->closed State-Changed-By: rth State-Changed-When: Tue Oct 22 00:06:05 2002 State-Changed-Why: No test case. And it's almost certainly a problem of invalid inline assembly rather than a compiler bug. http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&p r=8272 ------_=_NextPart_001_01C279EC.4BF69850 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable RE: target/8272: Unrecognized x86 instructions

I disagree. While I might buy that it is the fact = that the default of the compiler is 386 on an Intel86 platform rather = than 486+ might prevent these specific instructions. I am checking out = that theory today now that I have documents for Gcc.

The ASM instructions are correct as sent to you and = assemble in-line with both Microsoft,Intel and other compilers in both = Intel and ATT format.

If my theory about the cpu flag does not address this = issue then I am re-filing this bug and hope it gets assigned to someone = with some ability to properly verify a test scenario rather than just = guess.





-----Original Message-----
From: rth@gcc.gnu.org [mailto:rth@gcc.gnu.org]
Sent: Tuesday, October 22, 2002 12:06 AM
To: gcc-bugs@gcc.gnu.org; gcc-prs@gcc.gnu.org; = nobody@gcc.gnu.org; tpalmer@widevine.com
Subject: Re: target/8272: Unrecognized x86 = instructions

Synopsis: Unrecognized x86 instructions

State-Changed-From-To: open->closed
State-Changed-By: rth
State-Changed-When: Tue Oct 22 00:06:05 2002
State-Changed-Why:
    No test case.  And it's = almost certainly a problem of
    invalid inline assembly rather = than a compiler bug.

http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=3Dview%20au= dit-trail&database=3Dgcc&pr=3D8272

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