From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-prs-return-26456-listarch-gcc-prs=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 16821 invoked by alias); 19 Dec 2002 00:36:03 -0000
Mailing-List: contact gcc-prs-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Archive: <http://gcc.gnu.org/ml/gcc-prs/>
List-Post: <mailto:gcc-prs@gcc.gnu.org>
List-Help: <mailto:gcc-prs-help@gcc.gnu.org>
Sender: gcc-prs-owner@gcc.gnu.org
Received: (qmail 16803 invoked by uid 71); 19 Dec 2002 00:36:01 -0000
Date: Wed, 18 Dec 2002 16:36:00 -0000
Message-ID: <20021219003601.16802.qmail@sources.redhat.com>
To: nobody@gcc.gnu.org
Cc: gcc-prs@gcc.gnu.org,
From: Janis Johnson <janis187@us.ibm.com>
Subject: Re: optimization/8994: [3.2/3.3 regression] ICE with -O -march=pentium4
Reply-To: Janis Johnson <janis187@us.ibm.com>
X-SW-Source: 2002-12/txt/msg00985.txt.bz2
List-Id: <gcc-prs.sourceware.org>

The following reply was made to PR optimization/8994; it has been noted by GNATS.

From: Janis Johnson <janis187@us.ibm.com>
To: gcc-gnats@gcc.gnu.org, gcc-prs@gcc.gnu.org, towa8667@student.uu.se,
   gcc-bugs@gcc.gnu.org, nobody@gcc.gnu.org
Cc:  
Subject: Re: optimization/8994: [3.2/3.3 regression] ICE with -O -march=pentium4
Date: Wed, 18 Dec 2002 16:29:57 -0800

 The regression reported in PR optimization/8994 showed up
 starting with this patch:
 
 Thu Dec 13 12:31:07 CET 2001  Jan Hubicka  <jh@suse.cz>
 
         * i386.c (override_options): Recognize various CPU variants and
 set
         SSE/MMX/3dNOW flags accordingly.
         * i386.h (MASK_MMX_SET, MASK_SSE_SET, MASK_SSE2_SET,
 MASK_3DNOW_SET,
         MASK_3DNOW_A_SET): New.
         (MASK_ACCUMULATE_OUTGOING_ARGS_SET): New.
         (MASK_NO_ACCUMULATE_OUTGOING_ARGS): Delete.
         (MASK_*): Renumber.
         (TARGET_FLAGS): Use new masks.
         (CPP_CPU_SPECS): Recognize new CPU variants.
         * invoke.texi (-mcpu): Update documentation.
 
 In the ChangeLog and cvs logs, this in included with
 several other files whose changes seem to be separate.
 If I build cc1 just before this patch was added, the test
 compiles cleanly, but when the files i386.c and i386.h are
 updated it gets the same ICE as the mainline.
 
 I used Wolfgang's new test case:
 
 ---------------------
 void foo (double d)
 {
   union { double d; int i; } u;
 
   while (1)
   {
     u.d = d;
     if (u.i & 1) return;
   }
 }
 ---------------------
 
 Here's the compiler output when compiled with
 "-O -march=pentium4" on i686-linux with the mainline
 or the 3.2 branch:
 
 8994.c: In function `foo':
 8994.c:10: error: unable to find a register to spill in class `AREG'
 8994.c:10: error: this is the insn:
 (insn 19 18 20 1 0x2abbc2c0 (set (reg:CCNO 17 flags)
         (compare:CCNO (and:SI (subreg:SI (reg/v:DI 21 rxmm0 [59]) 0)
                 (const_int 1 [0x1]))
             (const_int 0 [0x0]))) 199 {testsi_1} (insn_list 16 (nil))
     (expr_list:REG_DEAD (reg/v:DI 21 rxmm0 [59])
         (nil)))
 8994.c:10: internal compiler error: in spill_failure, at reload1.c:1922
 Please submit a full bug report,
 with preprocessed source if appropriate.
 See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions.
 
 http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=8994