From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25370 invoked by alias); 19 Dec 2002 17:36:01 -0000 Mailing-List: contact gcc-prs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-prs-owner@gcc.gnu.org Received: (qmail 25324 invoked by uid 71); 19 Dec 2002 17:36:01 -0000 Resent-Date: 19 Dec 2002 17:36:01 -0000 Resent-Message-ID: <20021219173601.25323.qmail@sources.redhat.com> Resent-From: gcc-gnats@gcc.gnu.org (GNATS Filer) Resent-Cc: gcc-prs@gcc.gnu.org, gcc-bugs@gcc.gnu.org, Resent-Reply-To: gcc-gnats@gcc.gnu.org, rearnsha@arm.com Received: (qmail 25090 invoked by uid 61); 19 Dec 2002 17:35:34 -0000 Message-Id: <20021219173534.25089.qmail@sources.redhat.com> Date: Thu, 19 Dec 2002 09:36:00 -0000 From: rearnsha@arm.com Reply-To: rearnsha@arm.com To: gcc-gnats@gcc.gnu.org Cc: X-Send-Pr-Version: gnatsweb-2.9.3 (1.1.1.1.2.31) X-GNATS-Notify: Subject: middle-end/9009: floating-point negate and abs optimizations incorrect for ARM X-SW-Source: 2002-12/txt/msg01033.txt.bz2 List-Id: >Number: 9009 >Category: middle-end >Synopsis: floating-point negate and abs optimizations incorrect for ARM >Confidential: no >Severity: serious >Priority: medium >Responsible: unassigned >State: open >Class: sw-bug >Submitter-Id: net >Arrival-Date: Thu Dec 19 09:36:01 PST 2002 >Closed-Date: >Last-Modified: >Originator: Richard Earnshaw >Release: unknown-1.0 >Organization: >Environment: arm-elf cross >Description: Testsuite gcc.c-torture/exectue/930614-1.c fails after this patch: 2002-12-07 Roger Sayle * real.h (real_format): Add signbit field. * real.c (ieee_single_format, ieee_double_format, ieee_extended_motorola_format, ieee_extended_intel_96_format, ieee_extended_intel_128_format, ibm_extended_format, ieee_quad_format, vax_f_format, vax_d_format, vax_g_format, i370_single_format, i370_double_format, c4x_single_format, c4x_extended_format, real_internal_format): Provide suitable signbit value, or -1 to avoid bit twiddling. * optabs.c (expand_unop): Try implementing negation of floating point modes by flipping the sign bit. (expand_abs): Try implementing abs of floating point modes by clearing the sign bit. >How-To-Repeat: Run the testsuite >Fix: The reason for the failure is that on an ARM little-endian system the floating-point sign bit is in the lowest addressed word (that is, the sign bit is at position 31 (not 63) when the floating point value is considered as a 'long long' (ARM FPA double format is motorola word order, even when the system is little-endian). The code needs to take this into account (FLOAT_WORDS_BIG_ENDIAN != WORDS_BIG_ENDIAN) => the hi and lo fields should be swapped over. >Release-Note: >Audit-Trail: >Unformatted: