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From: Garen <garen@wsu.edu> To: hubicka@gcc.gnu.org Cc: gcc-prs@gcc.gnu.org, Subject: Re: other/10301: Side effects of architecture specific flags are not documented. Date: Thu, 24 Apr 2003 13:56:00 -0000 [thread overview] Message-ID: <20030424135601.10607.qmail@sources.redhat.com> (raw) The following reply was made to PR other/10301; it has been noted by GNATS. From: Garen <garen@wsu.edu> To: gcc-gnats@gcc.gnu.org, gcc-bugs@gcc.gnu.org, gcc-prs@gcc.gnu.org, hubicka@gcc.gnu.org, garen@garen.net Cc: Subject: Re: other/10301: Side effects of architecture specific flags are not documented. Date: Thu, 24 Apr 2003 06:38:31 -0700 According to http://gcc.gnu.org/gcc-3.2/changes.html, which says: Fixed common compiler crashes with SSE instruction set enabled (implied by -march=pentium3, pentium4, athlon-xp) I still don't see those implications of -msse and -msse2 anywhere in the manual still. I don't see how that couldn't be "confusing". In the x86 option sections the flags are listed with no info: -mmmx -mno-mmx -msse -mno-sse -msse2 -mno-sse2 -m3dnow It would be nice if instead it was something like: -mmmx Enable MMX instructions. Implied by -march=pentium-mmx, -march=pentium2 -mno-mmx Disable MMX instructions. -msse Enable SSE instructions. Implied by -march=pentium3, -march=athlon-* -mno-sse Disable SSE instructions. -msse2 Enable SSE2 instructions. Implied by -march=pentium4, ... -mno-sse2 Disable SSE2 instructions. -m3dnow Enable 3DNow! instructions. Implied by -march=athlon-*
next reply other threads:[~2003-04-24 13:56 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2003-04-24 13:56 Garen [this message] -- strict thread matches above, loose matches on Subject: below -- 2003-04-04 0:36 Garen 2003-04-03 15:10 bangerth 2003-04-03 2:36 garen
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