From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by sourceware.org (Postfix) with ESMTPS id 732453858D20 for ; Mon, 11 Mar 2024 16:21:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 732453858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 732453858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::62c ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710174082; cv=none; b=kLS8CAz+C5pV3KOdsu41A15mnfPZk9kJILzk2D3koNi9F+rwU0JvWdpIU00/dQ8El3d4B0XLI8heA+gC5H8jEsZa8t4ubIBaqTgJmcsOM2b45FDhbWzsPWt5smrYz1ld+mGKfoLBokFRMwBlqdmsxkjm/RRyswkBneJgYtrEp+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710174082; c=relaxed/simple; bh=8YjDQ3R/GkueoAkA4TKbpvo8nNmGa0L+qCLA+fZRGNc=; h=DKIM-Signature:Mime-Version:Subject:From:Date:Message-Id:To; b=SB1ziVIlxZAzcnjik46PoZsIfDMpKm8dTb9s1Ov3outc/FkM6h6uoQSdTk3EHyzFELy1BunD5l3UY7F9gcUOAORlOHKaYNQEsFyoOSBuu5h8WXW31GbO0skFEWtOm44dpg0DeJcrqBkjNDsfDufd5vGE3OZlaZq4etW9Q24PRAI= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-a4624024399so22766266b.0 for ; Mon, 11 Mar 2024 09:21:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710174079; x=1710778879; darn=gcc.gnu.org; h=to:references:message-id:content-transfer-encoding:cc:date :in-reply-to:from:subject:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=TZZ9u3Xz10JWbDKqYoRjHHsoYV2XrfBLzKoba2Vo6dU=; b=X0rkulv37H18w/WEkJLkbbpuRIe32aEaEQW0ohg+j0fyc4zKsOSRZ+GfU3MQZ/w6o8 MEfYURkvKO7DDomsndHXF7Hk1MShLxQ+XgNdVAsfWR7zTXHBTzlMR0xV9SXv0Up0OK2M I2QwKn6TTBa7tCdRejrlSa+omKnl6thYzn6D4D2iDNacb4uOfi9uvVqqy601xmv256CE Wn9OxnJgefPpNddCccprKwYX9f8arnswwKHNO9dexDVIAj8C8N6a044fsNz2jcq6eLhl /gw40RPjMhKlEodXgthL09K+HMTglqt9ktJIx4onvJtJGX7iEC9GTmLnNZB4UxgEoktp qprQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710174079; x=1710778879; h=to:references:message-id:content-transfer-encoding:cc:date :in-reply-to:from:subject:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TZZ9u3Xz10JWbDKqYoRjHHsoYV2XrfBLzKoba2Vo6dU=; b=J3ac+dCnUWEVmF2TD+iP5giDqSyXooNZLw19sk7IyHUYq1pw9ZE2zURcK5v+29CN2J 77eJQUWXQOkfa8RKn4Etr5+GBHdDAB6M+BFLCda7iyeuFh6OJh/9NxmFERujBpqA6wxk Ho4rAXYrGtDqNfL0xGfZ/PC+ulUhBNzKi+p/jAFAFOfCSn6UjiJBOSmqj5TcYbWNQJkL iJ2KGJQcNW1GTFbPW6THCJz20ZTpx6QOObIoRVnZB8YmijSGb6H36jOS7W3xWRx0Gs+j S9qM8Ibe+oUdPth5MnP+hp6x+2vbcbNvu3kQk0B5MYdWcPCAsVGjTqF+qb3iQUKOh4VW ln3w== X-Gm-Message-State: AOJu0YyLk4IUe1tfNoJkyw5dHXcV5pQDpgZiqhByM3F30jwgYkcWqCqD jxk3tXE9MV+99g/i86U/vvuLvnMIi0MmxdxCJ1sqBUgCqn4QyruxL2E4ejz+Bg== X-Google-Smtp-Source: AGHT+IHQ0TlyrF75fQGu4ILwmQSEqImsoe5cCzRTMXy+cffkBqAIptuy16s8O5b9i8l6+LTMadAaTg== X-Received: by 2002:a17:907:77d2:b0:a45:cdd7:c481 with SMTP id kz18-20020a17090777d200b00a45cdd7c481mr4330209ejc.1.1710174078944; Mon, 11 Mar 2024 09:21:18 -0700 (PDT) Received: from smtpclient.apple ([37.252.94.180]) by smtp.gmail.com with ESMTPSA id d4-20020a1709064c4400b00a44dca5f9c1sm2985311ejw.100.2024.03.11.09.21.17 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Mar 2024 09:21:18 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3774.300.61.1.2\)) Subject: Re: [Linaro-TCWG-CI] gcc-14-8492-g1a8261e047f: FAIL: 3 regressions on arm From: Maxim Kuvyrkov In-Reply-To: <2011853770.87.1706560560263@jenkins.jenkins> Date: Mon, 11 Mar 2024 20:21:04 +0400 Cc: gcc-regression@gcc.gnu.org, Linaro Toolchain Working Group Content-Transfer-Encoding: quoted-printable Message-Id: <0E8DF9D5-E7F3-436A-B515-A99565C94BA6@linaro.org> References: <2011853770.87.1706560560263@jenkins.jenkins> To: Richard Sandiford X-Mailer: Apple Mail (2.3774.300.61.1.2) X-Spam-Status: No, score=1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,KAM_SHORT,RCVD_IN_ABUSEAT,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > On Jan 30, 2024, at 00:35, ci_notify--- via Gcc-regression = wrote: >=20 > Dear contributor, our automatic CI has detected problems related to = your patch(es). Please find some details below. If you have any = questions, please follow up on linaro-toolchain@lists.linaro.org mailing = list, Libera's #linaro-tcwg channel, or ping your favourite Linaro = toolchain developer on the usual project channel. >=20 > We appreciate that it might be difficult to find the necessary logs or = reproduce the issue locally. If you can't get what you need from our CI = within minutes, let us know and we will be happy to help. >=20 > We track this report status in = https://linaro.atlassian.net/browse/GNU-1132 , please let us know if you = are looking at the problem and/or when you have a fix. >=20 > In gcc_check master-arm after: >=20 > | commit gcc-14-8492-g1a8261e047f > | Author: Richard Sandiford > | Date: Mon Jan 29 12:33:08 2024 +0000 > |=20 > | vect: Tighten vect_determine_precisions_from_range [PR113281] > | =20 > | This was another PR caused by the way that > | vect_determine_precisions_from_range handles shifts. We tried = to > | narrow 32768 >> x to a 16-bit shift based on range information = for > | the inputs and outputs, with vect_recog_over_widening_pattern > | (after PR110828) adjusting the shift amount. But this doesn't > | ... 36 lines of the commit log omitted. >=20 > FAIL: 3 regressions >=20 > regressions.sum: > =3D=3D=3D gcc tests =3D=3D=3D >=20 > Running gcc:gcc.target/arm/simd/simd.exp ... > FAIL: gcc.target/arm/simd/mve-vshr.c scan-assembler-times = vneg.s[0-9]+\\tq[0-9]+, q[0-9]+ 6 > FAIL: gcc.target/arm/simd/mve-vshr.c scan-assembler-times = vshl.s[0-9]+\\tq[0-9]+, q[0-9]+ 3 > FAIL: gcc.target/arm/simd/mve-vshr.c scan-assembler-times = vshl.u[0-9]+\\tq[0-9]+, q[0-9]+ 3 Hi Richard, Could you please check whether the above tests need an update after your = patch? We see these tests now consistently failing across all 32-bit = ARM configurations that we track (see [1]). As an example, our configure options for arm-linux-gnueabihf that show = the failure are at [2]. [1] https://linaro.atlassian.net/browse/GNU-1132 [2] = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/lastSuccessfulB= uild/artifact/artifacts/notify/configure-make.txt/*view*/ Thanks! -- Maxim Kuvyrkov https://www.linaro.org >=20 > =3D=3D=3D Results Summary =3D=3D=3D >=20 > You can find the failure logs in *.log.1.xz files in > - = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1636/artifact/a= rtifacts/00-sumfiles/ . > The full lists of regressions and progressions are in > - = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1636/artifact/a= rtifacts/notify/ . > The list of [ignored] baseline and flaky failures are in > - = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1636/artifact/a= rtifacts/sumfiles/xfails.xfail . >=20 > The configuration of this build is: > CI config tcwg_gcc_check master-arm >=20 > = -----------------8<--------------------------8<--------------------------8= <-------------------------- > The information below can be used to reproduce a debug environment: >=20 > Current build : = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1636/artifact/a= rtifacts > Reference build : = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1635/artifact/a= rtifacts >=20 > Reproduce last good and first bad builds: = https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/s= ha1/1a8261e047f7a2c2b0afb95716f7615cba718cd1/tcwg_gcc_check/master-arm/rep= roduction_instructions.txt >=20 > Full commit : = https://github.com/gcc-mirror/gcc/commit/1a8261e047f7a2c2b0afb95716f7615cb= a718cd1 >=20 > List of configurations that regressed due to this commit : > * tcwg_gcc_check > ** master-arm > *** FAIL: 3 regressions > *** = https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/s= ha1/1a8261e047f7a2c2b0afb95716f7615cba718cd1/tcwg_gcc_check/master-arm/det= ails.txt > *** = https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1636/artifact/a= rtifacts