[TCWG CI] Regression after gcc: omp-simd-clone: Allow fixed-lane vectors

[TCWG CI] Regression after gcc: omp-simd-clone: Allow fixed-lane vectors

[ci_notify]

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Regression after gcc: omp-simd-clone: Allow fixed-lane vectors:
commit f134a25ee8c29646f35f7e466109f6a7f5b9e824
Author: Andrew Stubbs <ams@codesourcery.com>

    omp-simd-clone: Allow fixed-lane vectors

Results changed to
-10
0
1
# build_abe bootstrap:
# FAILED
# First few build errors in logs:
# 00:04:21 make[3]: [Makefile:1787: aarch64-unknown-linux-gnu/bits/largefile-config.h] Error 1 (ignored)
# 00:04:21 make[3]: [Makefile:1788: aarch64-unknown-linux-gnu/bits/largefile-config.h] Error 1 (ignored)
# 00:09:26 /home/tcwg-buildslave/workspace/tcwg_gnu_13/abe/snapshots/gcc.git~master/gcc/poly-int.h:1295:22: error: comparison of integer expressions of different signedness: ‘const long unsigned int’ and ‘const int’ [-Werror=sign-compare]
# 00:09:35 make[3]: *** [Makefile:1146: omp-simd-clone.o] Error 1
# 00:26:43 make[2]: *** [Makefile:4979: all-stage2-gcc] Error 2
# 00:26:43 make[1]: *** [Makefile:25558: stage2-bubble] Error 2
# 00:26:43 make: *** [Makefile:1064: all] Error 2

from
-10
# true:
0
# build_abe binutils:
1
# build_abe bootstrap:
2

THIS IS THE END OF INTERESTING STUFF.  BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.

For latest status see comments in https://linaro.atlassian.net/browse/GNU-692 .
[GNU-692]
Status of basepoints/gcc-13-2290-gf134a25ee8c commit for ci_project tcwg_gcc_bootstrap:
* master-aarch64-bootstrap
** Regression after gcc: omp-simd-clone: Allow fixed-lane vectors:
** commit f134a25ee8c29646f35f7e466109f6a7f5b9e824
** Author: Andrew Stubbs <ams@codesourcery.com>
** 
**     omp-simd-clone: Allow fixed-lane vectors
** https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/

Details: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/jenkins/mail-body.txt/*view*/
Even more details: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/

First_bad build: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/build-f134a25ee8c29646f35f7e466109f6a7f5b9e824/
Last_good build: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/build-1025025b612d632920fe710bb58d36e4d43f3220/
Baseline build: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/build-baseline/
Even more details: https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/

Reproduce builds:
<cut>
mkdir investigate-gcc-f134a25ee8c29646f35f7e466109f6a7f5b9e824
cd investigate-gcc-f134a25ee8c29646f35f7e466109f6a7f5b9e824

# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts

# Fetch manifests and test.sh script
mkdir -p artifacts/build-baseline artifacts/build-parameters
curl -o artifacts/build-baseline/manifest.sh https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/build-baseline/manifest.sh --fail
curl -o artifacts/build-parameters/manifest.sh https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/build-parameters/manifest.sh --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_gcc_bootstrap-bisect-master-aarch64-bootstrap/12/artifact/artifacts/test.sh --fail
chmod +x artifacts/test.sh

# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_gnu-build.sh ^^ true %%rr[top_artifacts] artifacts/build-baseline

# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/

cd gcc

# Reproduce first_bad build
git checkout --detach f134a25ee8c29646f35f7e466109f6a7f5b9e824
../artifacts/test.sh

# Reproduce last_good build
git checkout --detach 1025025b612d632920fe710bb58d36e4d43f3220
../artifacts/test.sh

cd ..
</cut>

Full commit (up to 1000 lines):
<cut>
commit f134a25ee8c29646f35f7e466109f6a7f5b9e824
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Fri Aug 5 13:28:50 2022 +0100

    omp-simd-clone: Allow fixed-lane vectors
    
    The vecsize_int/vecsize_float has an assumption that all arguments will use
    the same bitsize, and vary the number of lanes according to the element size,
    but this is inappropriate on targets where the number of lanes is fixed and
    the bitsize varies (i.e. amdgcn).
    
    With this change the vecsize can be left zero and the vectorization factor will
    be the same for all types.
    
    gcc/ChangeLog:
    
            * doc/tm.texi: Regenerate.
            * omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
            vecsize.
            (simd_clone_adjust_argument_types): Likewise.
            * target.def (compute_vecsize_and_simdlen): Document the new
            vecsize_int and vecsize_float semantics.
---
 gcc/doc/tm.texi       |  3 +++
 gcc/omp-simd-clone.cc | 20 +++++++++++++++-----
 gcc/target.def        |  3 +++
 3 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 92bda1a7e14..c3001c6ded9 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6253,6 +6253,9 @@ stores.
 This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also
 @var{simdlen} field if it was previously 0.
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and
+@var{vecsize_float} should be left zero on targets where the number of lanes is
+not determined by the bitsize (in which case @var{simdlen} is always used).
 The hook should return 0 if SIMD clones shouldn't be emitted,
 or number of @var{vecsize_mangle} variants that should be emitted.
 @end deftypefn
diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
index 58bd68b129b..68ee4c2c3b0 100644
--- a/gcc/omp-simd-clone.cc
+++ b/gcc/omp-simd-clone.cc
@@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
     veclen = node->simdclone->vecsize_int;
   else
     veclen = node->simdclone->vecsize_float;
-  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
+  if (known_eq (veclen, 0))
+    veclen = node->simdclone->simdlen;
+  else
+    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
   if (multiple_p (veclen, node->simdclone->simdlen))
     veclen = node->simdclone->simdlen;
   if (POINTER_TYPE_P (t))
@@ -618,8 +621,12 @@ simd_clone_adjust_argument_types (struct cgraph_node *node)
 	    veclen = sc->vecsize_int;
 	  else
 	    veclen = sc->vecsize_float;
-	  veclen = exact_div (veclen,
-			      GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
+	  if (known_eq (veclen, 0))
+	    veclen = sc->simdlen;
+	  else
+	    veclen
+	      = exact_div (veclen,
+			   GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
 	  if (multiple_p (veclen, sc->simdlen))
 	    veclen = sc->simdlen;
 	  adj.op = IPA_PARAM_OP_NEW;
@@ -669,8 +676,11 @@ simd_clone_adjust_argument_types (struct cgraph_node *node)
 	veclen = sc->vecsize_int;
       else
 	veclen = sc->vecsize_float;
-      veclen = exact_div (veclen,
-			  GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
+      if (known_eq (veclen, 0))
+	veclen = sc->simdlen;
+      else
+	veclen = exact_div (veclen,
+			    GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
       if (multiple_p (veclen, sc->simdlen))
 	veclen = sc->simdlen;
       if (sc->mask_mode != VOIDmode)
diff --git a/gcc/target.def b/gcc/target.def
index 2a7fa68f83d..4d49ffc2c88 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1629,6 +1629,9 @@ DEFHOOK
 "This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}\n\
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also\n\
 @var{simdlen} field if it was previously 0.\n\
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and\n\
+@var{vecsize_float} should be left zero on targets where the number of lanes is\n\
+not determined by the bitsize (in which case @var{simdlen} is always used).\n\
 The hook should return 0 if SIMD clones shouldn't be emitted,\n\
 or number of @var{vecsize_mangle} variants that should be emitted.",
 int, (struct cgraph_node *, struct cgraph_simd_clone *, tree, int), NULL)
</cut>