Help with another constraint

Help with another constraint

[Balaji V. Iyer]

Hello Everyone,
    I am trying to partition register files in GCC port of Opencores
(OPENRISC 1000). It is currently failing the following constraint in
negdi2
 
(insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
                (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
        (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2} (nil)
    (nil))
../../gcc-4.0.2/gcc/libgcc2.c:72: internal compiler error: in
final_scan_insn, at final.c:2439
Please submit a full bug report,

 
REGISTER R2 is the frame pointer!!
 
I think this is because of the way I am handling the frame
pointer...This is how I do it in the or32.h file



#define FRAME_POINTER_REGNUM 2
#define FRAME_POINTER_REQUIRED 0
 
#define INITIAL_FRAME_POINTER_OFFSET(DEPTH)
\
{ int regno;
\
  int offset = 0;
\
  for( regno=0; regno < FIRST_PSEUDO_REGISTER;  regno++ )
\
    if( regs_ever_live[regno] && !call_used_regs[regno] )
\
      offset += 4;
\
  (DEPTH) = (!current_function_is_leaf || regs_ever_live[LINK_REGNUM] ?
4 : 0)  +       \
                (frame_pointer_needed ? 4 : 0)
+       \
                offset
+       \
                OR32_ALIGN(current_function_outgoing_args_size,4)
+       \
                OR32_ALIGN(get_frame_size(),4);
\
}

 
#define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
{ int offset = -1;
\
  rtx regs = stack_pointer_rtx;
\
  if (ADDR == frame_pointer_rtx)
\
    offset = 0;
\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) ==
frame_pointer_rtx \
           && GET_CODE (XEXP (ADDR, 0)) == CONST_INT)
\
    offset = INTVAL (XEXP (ADDR, 0));
\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) ==
frame_pointer_rtx \
           && GET_CODE (XEXP (ADDR, 1)) == CONST_INT)
\
    offset = INTVAL (XEXP (ADDR, 1));
\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) ==
frame_pointer_rtx) \
    { rtx other_reg = XEXP (ADDR, 1);
\
      offset = 0;
\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }
\
  else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) ==
frame_pointer_rtx) \
    { rtx other_reg = XEXP (ADDR, 0);
\
      offset = 0;
\
      regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); }
\
  if (offset >= 0)
\
    { int regno;
\
      extern char call_used_regs[];
\
      offset += 4; /* I don't know why??? */
\
      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
\
        if (regs_ever_live[regno] && ! call_used_regs[regno])
\
          offset += 4;
\
      ADDR = plus_constant (regs, offset + (DEPTH)); } }
 

 
 
 
 
What am I doing wrong??
 
 
ANy help is highly highly appreciated!
 
Yours Sincerely,
 
Balaji V. Iyer.
 
 
 
 
-- 
 
Balaji V. Iyer
PhD Student, 
Center for Efficient, Scalable and Reliable Computing,
Department of Electrical and Computer Engineering,
North Carolina State University.

Re: Help with another constraint

[Rask Ingemann Lambertsen]

On Sun, Dec 09, 2007 at 03:55:36AM -0500, Balaji V. Iyer wrote:
> Hello Everyone,
>     I am trying to partition register files in GCC port of Opencores
> (OPENRISC 1000). It is currently failing the following constraint in
> negdi2
>  
> (insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
		       ^^^
>                 (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
>         (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2} (nil)
>     (nil))
> ../../gcc-4.0.2/gcc/libgcc2.c:72: internal compiler error: in
> final_scan_insn, at final.c:2439
> Please submit a full bug report,

+(define_insn "negsi2"
+  [(set (match_operand:SI 0 "register_operand" "=r")
			      ^^^^^^^^^^^^^^^^
+       (neg:SI (match_operand:SI 1 "register_operand" "r")))]
+  ""
+  "l.sub   \t%0,r0,%1"
+  [(set_attr "type" "add")
+   (set_attr "length" "1")])

   How did that happen? Look at the dump files. Btw, what is the error
message above the insn dump?

-- 
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a year

RE: Help with another constraint

[Balaji V. Iyer]

Hello Rask,
	I am not understanding your response, can you clarify it for me?

As per the question  about the error message above?

../../gcc-4.0.2/gcc/libgcc2.c -o libgcc/./_negdi2.o
../../gcc-4.0.2/gcc/libgcc2.c: In function '__negdi2':
../../gcc-4.0.2/gcc/libgcc2.c:72: error: insn does not satisfy its
constraints:
(insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
                (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
        (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2} (nil)
    (nil))
../../gcc-4.0.2/gcc/libgcc2.c:72: internal compiler error: in
final_scan_insn, at final.c:2439
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.
make[2]: *** [libgcc/./_negdi2.o] Error 1
make[2]: Leaving directory 



-Balaji V. Iyer.


-- 
 
Balaji V. Iyer
PhD Student, 
Center for Efficient, Scalable and Reliable Computing,
Department of Electrical and Computer Engineering,
North Carolina State University.


-----Original Message-----
From: Rask Ingemann Lambertsen [mailto:rask@sygehus.dk] 
Sent: Sunday, December 09, 2007 8:08 AM
To: Balaji V. Iyer
Cc: gcc@gcc.gnu.org; openrisc@opencores.org
Subject: Re: Help with another constraint

On Sun, Dec 09, 2007 at 03:55:36AM -0500, Balaji V. Iyer wrote:
> Hello Everyone,
>     I am trying to partition register files in GCC port of Opencores 
> (OPENRISC 1000). It is currently failing the following constraint in
> negdi2
>  
> (insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
		       ^^^
>                 (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
>         (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2}
(nil)
>     (nil))
> ../../gcc-4.0.2/gcc/libgcc2.c:72: internal compiler error: in 
> final_scan_insn, at final.c:2439 Please submit a full bug report,

+(define_insn "negsi2"
+  [(set (match_operand:SI 0 "register_operand" "=r")
			      ^^^^^^^^^^^^^^^^
+       (neg:SI (match_operand:SI 1 "register_operand" "r")))]  ""
+  "l.sub   \t%0,r0,%1"
+  [(set_attr "type" "add")
+   (set_attr "length" "1")])

   How did that happen? Look at the dump files. Btw, what is the error
message above the insn dump?

--
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a
year

Re: Help with another constraint

['Rask Ingemann Lambertsen']

On Sun, Dec 09, 2007 at 11:35:32AM -0500, Balaji V. Iyer wrote:
> Hello Rask,
> 	I am not understanding your response, can you clarify it for me?
> 
> As per the question  about the error message above?
> 
> ../../gcc-4.0.2/gcc/libgcc2.c -o libgcc/./_negdi2.o
> ../../gcc-4.0.2/gcc/libgcc2.c: In function '__negdi2':
> ../../gcc-4.0.2/gcc/libgcc2.c:72: error: insn does not satisfy its
> constraints:

   I think this is misleading you. It seems likely that the problem is with
the predicate and not the constraint.

> (insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
                       ^^^

   This has to be a register, doesn't it? If so, use -fdump-rtl-all and look
at the dump files to see where it goes wrong.

>                 (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
>         (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2} (nil)
>     (nil))

   Please also post your negsi2 pattern.

-- 
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a year

RE: Help with another constraint

[Balaji V. Iyer]

Hello Everyone,
    I got past that negdi2 and some errors..now I am trying to compile
some linux module, and it says I am not able to find this constraint:

init/main.c: In function 'start_kernel':
init/main.c:441: error: insn does not satisfy its constraints:
(insn 112 110 478 12 (set (mem:QI (reg/v/f:SI 16 r16 [orig:72 line.183 ]
[72]) [0 S1 A8])
        (const_int 0 [0x0])) 16 {movqi} (nil)
    (nil))
init/main.c:441: internal compiler error: in
reload_cse_simplify_operands, at postreload.c:391
Please submit a full bug report,

Here is what I have for movqi:

(define_insn "movqi"
  [(set (match_operand:QI 0 "nonimmediate_operand" "=p,q,m,m,p,q,p,q")
        (match_operand:QI 1 "general_operand"       "m,m,p,q,p,q,I,I"))]
  ""
  "*
  switch(which_alternative)
   {
     case 0:
     case 1:
       return \"l.lbz   \\t%0,%1\";
     case 2:
     case 3:
       return \"l.sb    \\t%0,%1\";
     case 4:
     case 5:
       return \"l.ori   \\t%0,%1,0\\t # move reg to reg\";
     case 6:
     case 7:
       return \"l.addi  \\t%0,r0,%1\\t # move immediate\";
     default:
       return \"invalid alternative\";
   }
  "

To give a quick explanation: 
p = register numbers between 0-31 (inclusive)
q = register numbers between 32-63 (inclusive)

I = constant int value: ((VALUE) >=-32768 && (VALUE) <=32767)

So, what am I missing?

Any help is highly appreciated!
 

Thanking You,

Yours Sincerely,

Balaji V. Iyer.


-- 
 
Balaji V. Iyer
PhD Student, 
Center for Efficient, Scalable and Reliable Computing,
Department of Electrical and Computer Engineering,
North Carolina State University.


-----Original Message-----
From: 'Rask Ingemann Lambertsen' [mailto:rask@sygehus.dk] 
Sent: Monday, December 10, 2007 12:16 PM
To: Balaji V. Iyer
Cc: gcc@gcc.gnu.org; openrisc@opencores.org
Subject: Re: Help with another constraint

On Sun, Dec 09, 2007 at 11:35:32AM -0500, Balaji V. Iyer wrote:
> Hello Rask,
> 	I am not understanding your response, can you clarify it for me?
> 
> As per the question  about the error message above?
> 
> ../../gcc-4.0.2/gcc/libgcc2.c -o libgcc/./_negdi2.o
> ../../gcc-4.0.2/gcc/libgcc2.c: In function '__negdi2':
> ../../gcc-4.0.2/gcc/libgcc2.c:72: error: insn does not satisfy its
> constraints:

   I think this is misleading you. It seems likely that the problem is
with the predicate and not the constraint.

> (insn 15 13 16 (set (mem:SI (plus:SI (reg/f:SI 2 r2)
                       ^^^

   This has to be a register, doesn't it? If so, use -fdump-rtl-all and
look at the dump files to see where it goes wrong.

>                 (const_int -28 [0xffffffe4])) [0 D.1256+0 S4 A32])
>         (neg:SI (reg:SI 3 r3 [orig:80 D.1255 ] [80]))) 38 {negsi2}
(nil)
>     (nil))

   Please also post your negsi2 pattern.

--
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a
year

RE: Help with another constraint

[Revital1 Eres]

Hello,

I think you should add the pair of constraints m and I respectively to
the description of the instruction in your md file (and a relevant
case 8 to handle such instruction), i.e.:

 (define_insn "movqi"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=p,q,m,m,p,q,p,q")
-        (match_operand:QI 1 "general_operand"       "m,m,p,q,p,q,I,I"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=p,q,m,m,p,q,p,q,m")
+        (match_operand:QI 1 "general_operand"       "m,m,p,q,p,q,I,I,I"))]
   ""
   "*
   switch(which_alternative)
@@ -17,6 +17,8 @@
      case 6:
      case 7:
        return \"l.addi  \\t%0,r0,%1\\t # move immediate\";,
+     case 8:
+       return ...;
      default:
        return \"invalid alternative\";
    }

It seems that the pair m and I is missing (which indicate the memory =
constant instruction).  You could look for which_alternative variable
in GCC internals for more details on this.

Revital

RE: Help with another constraint

[Balaji V. Iyer]

Hi Revital1,
	 Thank you very much for your help. The ISA I am using
(OpenRISC) does not provide an alternative for moving a constant into
memory. The only way of doing this is to move the constant into a
register (which i am doing) and then move that register value into
memory. So what can I do in that case?

Thanks,

Baljai V. Iyer.


-- 
 
Balaji V. Iyer
PhD Student, 
Center for Efficient, Scalable and Reliable Computing,
Department of Electrical and Computer Engineering,
North Carolina State University.


-----Original Message-----
From: Revital1 Eres [mailto:ERES@il.ibm.com] 
Sent: Wednesday, December 12, 2007 7:14 AM
To: Balaji V. Iyer
Cc: gcc@gcc.gnu.org; openrisc@opencores.org; 'Rask Ingemann Lambertsen'
Subject: RE: Help with another constraint

Hello,

I think you should add the pair of constraints m and I respectively to
the description of the instruction in your md file (and a relevant case
8 to handle such instruction), i.e.:

 (define_insn "movqi"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=p,q,m,m,p,q,p,q")
-        (match_operand:QI 1 "general_operand"
"m,m,p,q,p,q,I,I"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand"
"=p,q,m,m,p,q,p,q,m")
+        (match_operand:QI 1 "general_operand"
"m,m,p,q,p,q,I,I,I"))]
   ""
   "*
   switch(which_alternative)
@@ -17,6 +17,8 @@
      case 6:
      case 7:
        return \"l.addi  \\t%0,r0,%1\\t # move immediate\";,
+     case 8:
+       return ...;
      default:
        return \"invalid alternative\";
    }

It seems that the pair m and I is missing (which indicate the memory =
constant instruction).  You could look for which_alternative variable in
GCC internals for more details on this.

Revital

RE: Help with another constraint

[Dave Korn]

On 12 December 2007 12:14, Revital1 Eres wrote:

> It seems that the pair m and I is missing (which indicate the memory =
> constant instruction).  

  So doesn't the question then become "Why isn't reload reloading the constant
into a register"?


    cheers,
      DaveK
-- 
Can't think of a witty .sigline today....

Re: Help with another constraint

[Rask Ingemann Lambertsen]

On Wed, Dec 12, 2007 at 01:01:00PM -0000, Dave Korn wrote:
> On 12 December 2007 12:14, Revital1 Eres wrote:
> 
> > It seems that the pair m and I is missing (which indicate the memory =
> > constant instruction).  
> 
>   So doesn't the question then become "Why isn't reload reloading the constant
> into a register"?

   One possibility is that reload is not run on insns produced by reload
itself. Other usual suspects are post-reload splitters and peepholes.

-- 
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a year

RE: Help with another constraint

[Hans-Peter Nilsson]

On Wed, 12 Dec 2007, Dave Korn wrote:

> On 12 December 2007 12:14, Revital1 Eres wrote:
>
> > It seems that the pair m and I is missing (which indicate the memory =
> > constant instruction).
>
>   So doesn't the question then become "Why isn't reload reloading the constant
> into a register"?

Yes.  And the answer AFAIK is "because it doesn't see a way to
move a constant into a register; it understands "r", not "p" and
"q".

So bviyer, add an "r" alternative.  See also the "*" and "#"
qualifiers.  No need for bogus 0 -to- memory alternatives.

brgds, H-P

RE: Help with another constraint

[Hans-Peter Nilsson]

On Sun, 16 Dec 2007, Hans-Peter Nilsson wrote:
> On Wed, 12 Dec 2007, Dave Korn wrote:
>
> > On 12 December 2007 12:14, Revital1 Eres wrote:
> >
> > > It seems that the pair m and I is missing (which indicate the memory =
> > > constant instruction).
> >
> >   So doesn't the question then become "Why isn't reload reloading the constant
> > into a register"?
>
> Yes.  And the answer AFAIK is "because it doesn't see a way to
> move a constant into a register; it understands "r", not "p" and
> "q".

I think I have to correct myself; register allocation and reload
*should* understand p and q as register constraints, given e.g.
a correct REG_CLASS_FROM_LETTER definition and correct regclass
macros.  The latter were not disclosed and are usually a source
of hard-to-find errors.

Besides, if you can't directly move between p and q (as your
constraints indicate) then as Rask says, you also need to tell
GCC through the secondary-reload mechanisms.

I can't help but thinking the best suggetion is for bviyer to
let gdb answer the question by stepping through cc1 instead of
relying on indirect debugging.  That's what people do. ;)

brgds, H-P

Re: Help with another constraint

['Rask Ingemann Lambertsen']

On Wed, Dec 12, 2007 at 12:06:04AM -0500, Balaji V. Iyer wrote:
> Hello Everyone,
>     I got past that negdi2 and some errors..now I am trying to compile
> some linux module, and it says I am not able to find this constraint:
> 
> init/main.c: In function 'start_kernel':
> init/main.c:441: error: insn does not satisfy its constraints:
> (insn 112 110 478 12 (set (mem:QI (reg/v/f:SI 16 r16 [orig:72 line.183 ]
> [72]) [0 S1 A8])
>         (const_int 0 [0x0])) 16 {movqi} (nil)
>     (nil))
> init/main.c:441: internal compiler error: in
> reload_cse_simplify_operands, at postreload.c:391
> Please submit a full bug report,
> 
> Here is what I have for movqi:

   The movxx patterns are special and you'll need to hold the compiler's
hands a little. Since your target can't move immediates directly to memory,
you have to ask for a secondary reload to an intermediate register. Use the
target hook TARGET_SECONDARY_RELOAD.

   When you've got the secondary reloads working, you can likely improve
code quality:

1) Use a movqi expander to expand the instructions correctly to begin with.
For example, if operand 0 is in memory and operand 1 is an immediate, use

	operands[1] = force_reg (QImode, operands[1]);

Rename the "movqi" insn to "*movqi".

> (define_insn "movqi"
>   [(set (match_operand:QI 0 "nonimmediate_operand" "=p,q,m,m,p,q,p,q")
>         (match_operand:QI 1 "general_operand"       "m,m,p,q,p,q,I,I"))]
>   ""
    ^^
2) Reject operand combinations that aren't supported, such as operand 0
being in memory and operand 1 being an immediate.

   You can look at other RISC targets (e.g. ARM, PA-RISC, MIPS, SPARC, Alpha
or RS6000) for examples.

>   "*

   New ports should not use the old-style "* ... " C-blocks. Use { ... } as
documented. Then you'll also avoid the \" and \\ sequences.

>   switch(which_alternative)
>    {
>      case 0:
>      case 1:
>        return \"l.lbz   \\t%0,%1\";
>      case 2:
>      case 3:
>        return \"l.sb    \\t%0,%1\";
>      case 4:
>      case 5:
>        return \"l.ori   \\t%0,%1,0\\t # move reg to reg\";
>      case 6:
>      case 7:
>        return \"l.addi  \\t%0,r0,%1\\t # move immediate\";
>      default:
>        return \"invalid alternative\";
>    }

   Presumably you've temporarily coded it this way for debugging purposes.
If not, use the normal way:

   "@
    l.lbz ...
    l.sb ...
    ..."

> To give a quick explanation: 
> p = register numbers between 0-31 (inclusive)
> q = register numbers between 32-63 (inclusive)

   You use them in pairs a lot. Define a register class which consists of
registers 0-64 and use that in your constraints.
 
-- 
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a year

Re: Help with another constraint

[Rask Ingemann Lambertsen]

On Wed, Dec 12, 2007 at 03:35:09PM +0100, 'Rask Ingemann Lambertsen' wrote:
> 
>    The movxx patterns are special and you'll need to hold the compiler's
> hands a little. Since your target can't move immediates directly to memory,
> you have to ask for a secondary reload to an intermediate register. Use the
> target hook TARGET_SECONDARY_RELOAD.

   Actually, how do you do that? I can't see any place in the documentation
that says how TARGET_SECONDARY_RELOAD can be used for that purpose.

-- 
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a year

RE: Help with another constraint

[Balaji V. Iyer]

Hi Rask,
	First, Thank you very much for all help you have provided me. It
really help me finish my project.

This is what I did:

I capture all the moves regardless of the operand and then to move an
immediate into a regiser, I force a register:

here is the code for this:


      if (!no_new_pseudos)
        { 
          /* taking care of moving constant integers */
          if (GET_CODE (operands[1]) == CONST_INT)
            {
              rtx reg = gen_reg_rtx (SImode);

              emit_insn (gen_movsi (reg, operands[1]));
              operands[1] = gen_lowpart (QImode, reg);
            }
           /* moving memory operands */
          if (GET_CODE (operands[1]) == MEM)
            {
              rtx reg = gen_reg_rtx (SImode);

              emit_insn (gen_rtx_SET (SImode, reg,
                                  gen_rtx_ZERO_EXTEND (SImode,
                                                       operands[1])));

              operands[1] = gen_lowpart (QImode, reg);
            }
           /* moving register operands */
          if (GET_CODE (operands[0]) != REG)
            operands[1] = force_reg (QImode, operands[1]);
        }

I hope this helps.

-Balaji V. Iyer.

-- 
 
Balaji V. Iyer
PhD Student, 
Center for Efficient, Scalable and Reliable Computing,
Department of Electrical and Computer Engineering,
North Carolina State University.


-----Original Message-----
From: Rask Ingemann Lambertsen [mailto:rask@sygehus.dk] 
Sent: Monday, December 17, 2007 1:33 PM
To: Balaji V. Iyer
Cc: gcc@gcc.gnu.org; openrisc@opencores.org
Subject: Re: Help with another constraint

On Wed, Dec 12, 2007 at 03:35:09PM +0100, 'Rask Ingemann Lambertsen'
wrote:
> 
>    The movxx patterns are special and you'll need to hold the 
> compiler's hands a little. Since your target can't move immediates 
> directly to memory, you have to ask for a secondary reload to an 
> intermediate register. Use the target hook TARGET_SECONDARY_RELOAD.

   Actually, how do you do that? I can't see any place in the
documentation that says how TARGET_SECONDARY_RELOAD can be used for that
purpose.

--
Rask Ingemann Lambertsen
Danish law requires addresses in e-mail to be logged and stored for a
year