Question of 2nd instruction scheduling pass

Question of 2nd instruction scheduling pass

[Ling-hua Tseng]

I'm porting gcc-4.0.1 to a new VLIW architecture.
I figured out that the `insn' and `jump_insn' were grouped together in the 2nd sched pass
however there is a `structural hazard' between them.
Such as the following code which generated by gcc -O3 -dP -S code.c:
@(insn:TI 319 315 474 (set (reg/v:SI 7 r7 [orig:107 j.162 ] [107])
@        (const_int 0 [0x0])) 14 {*movsi_const} (nil)
@    (nil))
        mov     .r0     r7, #0  \\      @ 319   *movsi_const/1  [length = 4]
@(jump_insn 474 319 475 (set (pc)   
@        (label_ref 229)) 81 {jump} (nil)
@    (nil))
        b       <no FU available>  .L37            @ 474   jump    [length = 4]

I think that the jump_insn must have the TImode, but it don't.

The insn attribute `type' of "*movsi_const" is called "r_dp" (RISC data processing).
The insn attribute `type' of "jump" is called "r_branch" (RISC branch).
The two type of instructions are handled by the same `RISC' function unit (called `r0').

My automata-based pipeline description is also written the following code:
(define_insn_reservation "risc_data_processing" 4
  (eq_attr "type" "r_dp")
  "r0")
(define_insn_reservation "risc_branch" 0
  (eq_attr "type" "r_branch")
  "r0")

They should reserved the `r0' (RISC 0) when they're issued.
So they shouldn't be issued in the same cycle however.

Nevertheless, sometimes the jump_insn has the correct mode:
@(insn/f:TI 58 57 59 (set (reg/f:SI 11 r11)
@        (plus:SI (reg:SI 13 r13)
@            (const_int -4 [0xfffffffc]))) 45 {*addsi3} (insn_list:REG_DEP_ANTI 57 (insn_list:REG_DEP_TRUE 56 (nil)))
@    (expr_list:REG_DEAD (reg:SI 13 r13)
@        (nil)))  
        sub     .r0     r11, r13, #4            @ 58    *addsi3/2       [length = 4]
@(jump_insn:TI 17 59 19 (set (pc)
@        (if_then_else (le (reg/v:SI 2 r2 [orig:111 size ] [111])
@                (const_int 0 [0x0]))
@            (label_ref 37)
@            (pc))) 83 {cbranchsi4} (insn_list:REG_DEP_ANTI 56 (insn_list:REG_DEP_ANTI 58 (insn_list:REG_DEP_ANTI 57 (nil))))
@    (expr_list:REG_BR_PROB (const_int 5000 [0x1388])
@        (nil)))  
        b {!C}  .r0     .L11            @ 17    cbranchsi4/1    [length = 4]

I discoverd that the `unconditional branch' is always issued with other insns and the `conditional branch' isn't.
Are there any ways to tell GCC that don't group an jump_insn with other insns when structural hazard occured?

Thanks a lot.

Re: Question of 2nd instruction scheduling pass

[James E Wilson]

Ling-hua Tseng wrote:
> Are there any ways to tell GCC that don't group an jump_insn with
> other insns when structural hazard occured?

Probably multiple ways, depending on what exactly the problem is.

I'd suggest using -da -fsched-verbose=2 and looking at the scheduling
info printed in the sched dumps to see what is going on.  You should get
a clue to what is wrong there.

You can also try debugging the scheduler code.   Grepping for TImode
shows that it is set in schedule_insn in haifa-sched.c, and then you can
work backwards from there to figure out why it doesn't get set in your case.
-- 
Jim Wilson, GNU Tools Support, http://www.specifix.com