From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ben Combee" To: "Jeff Garzik" Cc: Subject: Re: MMX regs and GCC Date: Wed, 08 Sep 1999 13:42:00 -0000 Message-id: <02cf01befa3a$10bb2560$3404010a@metrowerks.com> References: <199909081748.KAA22465@netcom1.netcom.com> <37D6C6D7.80917F58@pobox.com> X-SW-Source: 1999-09/msg00304.html > hmmm. I have the Pentium Pro databooks, and the quoted text below seems > to imply direct moves between general registers are possible. Since > reg<->MMX reg transfers are possible, that seems to imply that loading > and using data in MMX registers would be cheaper than loaded data from > memory. Actually, we have considered adding code to do that to CodeWarrior -- the biggest problem is that using MMX registers inteferes with any usage of the FP registers, and on some MMX-capable chips, the time to handle a EMMS instruction can be quite substancial. However, if you are already generating MMX or 3DNow! code, then spilling a 32-bit value to a MMX register is probably just fine, as long as by doing so you aren't causing additional spills of MMX registers (the CodeWarrior MMX-3DNow! calling convention that we use for 3DNow! optimized code specifies that MM4-MM7 are preserved across calls) -- Ben Combee, x86 CompilerWarrior From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ben Combee" To: "Jeff Garzik" Cc: Subject: Re: MMX regs and GCC Date: Thu, 30 Sep 1999 18:02:00 -0000 Message-ID: <02cf01befa3a$10bb2560$3404010a@metrowerks.com> References: <199909081748.KAA22465@netcom1.netcom.com> <37D6C6D7.80917F58@pobox.com> X-SW-Source: 1999-09n/msg00304.html Message-ID: <19990930180200.IzHGyhhCjAX5rc83bBh9v_62GOtbAt46y1CEgfvmpwI@z> > hmmm. I have the Pentium Pro databooks, and the quoted text below seems > to imply direct moves between general registers are possible. Since > reg<->MMX reg transfers are possible, that seems to imply that loading > and using data in MMX registers would be cheaper than loaded data from > memory. Actually, we have considered adding code to do that to CodeWarrior -- the biggest problem is that using MMX registers inteferes with any usage of the FP registers, and on some MMX-capable chips, the time to handle a EMMS instruction can be quite substancial. However, if you are already generating MMX or 3DNow! code, then spilling a 32-bit value to a MMX register is probably just fine, as long as by doing so you aren't causing additional spills of MMX registers (the CodeWarrior MMX-3DNow! calling convention that we use for 3DNow! optimized code specifies that MM4-MM7 are preserved across calls) -- Ben Combee, x86 CompilerWarrior