From: Aurelien Buhrig <aurelien.buhrig.gcc@gmail.com>
To: gcc@gcc.gnu.org
Subject: input address reload issue
Date: Thu, 05 Jan 2017 16:20:00 -0000 [thread overview]
Message-ID: <094e7c3d-fc6c-1b0a-29c3-263cadec25a7@gmail.com> (raw)
Hi all, and best wishes for the happy new year!
I'm porting a private 4.6 backend to GCC 6 and facing a reload issue and
I would appreciate a little help to cope with it.
The issue happens when reloading:
(set (reg:QI 47 [ _9 ])
(mem:QI (plus:SI (reg/v/f:SI 68 [orig:51 in ] [51])
(const_int 1 [0x1])
My understanding is that IRA allocates hardregs to allocno which are
replaced by the reload pass which generates new reloads or spills regs
when needed, right?
Here the IRA chooses a reg (named r2)which makes the mem address not
legitimate. Is it valid to allocate a reg which makes non legitimate
address?
Assuming it is, my understanding is that the reload chooses a legitimate
reg (named a0 here) and shall emit insns (in emit_reload_insns) to set
a0 correctly (RELOAD_FOR_INPUT_ADDRESS). Right?
So the insn:
(set (reg:QI 0 r0) (mem:QI (plus:SI (reg:SI 2 r2)(const_int 1))
is transformed into:
(set (reg:SI 8 a0) (reg:SI 2 r2))
(set (reg:SI 8 a0) (const_int 1))
(set (reg:SI 8 a0) (plus:SI (reg:SI 8 a0) (reg:SI 8 a0)))
(set (reg:QI 0 r0) (mem:QI (reg:SI 8 a0))
This "basic" transformation requires two reload regs, but only one is
given/used/possible from the rl structure (in emit_reload_insns).
So where does the issue comes from? The need for 2 reload regs, the
transformation which is too "basic" and could be optimized to use only
one reload reg, or any wrong/missing reload target hook?
Thanks in advance.
Aurélien
next reply other threads:[~2017-01-05 16:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-05 16:20 Aurelien Buhrig [this message]
2017-01-05 17:46 ` Jeff Law
2017-01-06 10:21 ` Aurelien Buhrig
2017-01-06 16:06 ` Jeff Law
2017-01-09 14:03 ` Aurelien Buhrig
2017-01-09 18:35 ` Jeff Law
2017-01-12 11:01 ` Aurelien Buhrig
2017-01-06 8:50 ` Segher Boessenkool
2017-01-06 10:28 ` Aurelien Buhrig
2017-01-06 10:53 ` Segher Boessenkool
2017-01-06 16:09 ` Jeff Law
2017-01-06 16:37 ` Eric Botcazou
2017-01-06 16:46 ` Jeff Law
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