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[24.4.73.83]) by smtp.gmail.com with ESMTPSA id h5-20020aa79f45000000b0056b9df2a15esm162623pfr.62.2022.11.04.16.39.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Nov 2022 16:39:00 -0700 (PDT) Message-ID: <1202fdda-12b7-8e75-a327-9b7888d4af9d@rivosinc.com> Date: Fri, 4 Nov 2022 16:38:59 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: query about commit 666fdc46bc8489 ("RISC-V: Fix bad insn splits with paradoxical subregs") Content-Language: en-US To: Jeff Law , Jakub Jelinek Cc: gcc@gcc.gnu.org, Michael Collison References: <23ac9d02-c687-7680-493b-8ace1558a4cb@rivosinc.com> <2541e77f-f069-13d1-c08e-47f55677a596@gmail.com> From: Vineet Gupta In-Reply-To: <2541e77f-f069-13d1-c08e-47f55677a596@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=0.2 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,NICE_REPLY_A,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/4/22 16:13, Jeff Law wrote: > > On 11/4/22 16:59, Vineet Gupta wrote: >> Hi Jakub, >> >> I had a question about the aforementioned commit in RV backend. >> >> (define_split >>   [(set (match_operand:GPR 0 "register_operand") >>     (and:GPR (match_operand:GPR 1 "register_operand") >>                (match_operand:GPR 2 "p2m1_shift_operand"))) >> +   (clobber (match_operand:GPR 3 "register_operand"))] >>   "" >> -  [(set (match_dup 0) >> +  [(set (match_dup 3) >>        (ashift:GPR (match_dup 1) (match_dup 2))) >> >> Is there something specific to this split which warrants this or so >> any split patterns involving shifts have this to avoid the shifting >> by more than SUBREG_REG problem. > > Not sure.  Note it was Jim Wilson's change, not Jakub's change AFAICT: > > > commit 666fdc46bc848984ee7d2906f2dfe10e1ee5d535 > Author: Jim Wilson > Date:   Sat Jun 30 21:52:01 2018 +0000 > >     RISC-V: Add patterns to convert AND mask to two shifts. > >             gcc/ >             * config/riscv/predicates.md (p2m1_shift_operand): New. >             (high_mask_shift_operand): New. Indeed Jim introduced the pattern with 666fdc46bc8, but the clobber was added later in 36ec3f57d305 ("RISC-V: Fix bad insn splits with paradoxical subregs"). He attributed this to Jakub, and with Jim not being super active these days, I tried reaching out to this cc list. Sorry I pasted wrong sha-id in my orig msg, it needs to be 36ec3f57d305 > > You might find further discussion in the gcc-patches archives. I'll dig some more. > >> >> Also could you please explain where the clobber itself is allocated ? > > I'd expect the combiner.   There's going to be 2 or more insns that > are combined to create this pattern where the output of one feeds a > subsequent insn and dies.  So it's effectively a temporary.  Combine > will re-use that temporary as the clobbered operand. Make sense. Thx, -Vineet