* 971023 CPU32 patch
@ 1997-10-24 1:59 Robin Kirkham
0 siblings, 0 replies; only message in thread
From: Robin Kirkham @ 1997-10-24 1:59 UTC (permalink / raw)
To: egcs
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Herewith a patch for impoving egcs's external behaviour with respect to the
CPU32, in generic cross-compiler configurations (e.g., m68k-coff):
o the flag -mcpu32 by default no longer emits 68881 floating-point
instructions
o -mcpu32 defines preprocessor symbols __mcpu32__, __mcpu32 (and mcpu32,
without -ansi, as per normal)
o -m68332 still works, but is now redundant. It defines __m68332__ and so
on, along with __mcpu32__ etc but is otherwise the same as -mcpu32
o the CPU32 now has its own multilib
o a redundant m68000/msoft-float multilib is no longer built
I think the redundant -m68332 and -m68302 flags could be removed (-m68302 is
already identical to -m68000, except for a preprocessor symbol). I was talked
out of providing -m switches for the whole 683xx family, and I think it
should be "all or none".
This patch does not alter the internal gcc code-generator behavour, in so
far as it still regards the CPU32 as a 68020 variant, equivalent to by
default -m68020 -mno-bitfields -msoft-float.
For this patch to work, you need to use a very recent binutils snapshot, or
apply the binutils-2.8.1 patch below. This is to prevent gas complaining
about certain "tst.l %a0" instructions.
I've tested this patch on egcs 971023 and 971016.
Robin Kirkham CSIRO Manufacturing Science and Technology
Project Engineer Locked Bag 9, Preston 3072, Australia
robin.kirkham@mlb.dmt.csiro.au Phone: +61 3 9662-7756 Fax: +61 3 9662-7851
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*** config/m68k/m68k.h Tue Sep 23 03:46:38 1997
--- config/m68k/m68k.h Fri Oct 24 13:06:08 1997
***************
*** 165,171 ****
{ "68060", - (MASK_5200|MASK_68040)}, \
{ "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
|MASK_68040_ONLY|MASK_68060)}, \
! { "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
{ "5200", (MASK_5200)}, \
{ "68851", 0}, \
{ "no-68851", 0}, \
--- 165,172 ----
{ "68060", - (MASK_5200|MASK_68040)}, \
{ "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
|MASK_68040_ONLY|MASK_68060)}, \
! { "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD \
! |MASK_68881)}, \
{ "5200", (MASK_5200)}, \
{ "68851", 0}, \
{ "no-68851", 0}, \
***************
*** 172,181 ****
{ "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
{ "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
! |MASK_BITFIELD)}, \
{ "68332", MASK_68020}, \
{ "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
! |MASK_BITFIELD)}, \
{ "cpu32", MASK_68020}, \
{ "align-int", MASK_ALIGN_INT }, \
{ "no-align-int", -MASK_ALIGN_INT }, \
--- 173,182 ----
{ "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
{ "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
! |MASK_BITFIELD|MASK_68881)}, \
{ "68332", MASK_68020}, \
{ "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
! |MASK_BITFIELD|MASK_68881)}, \
{ "cpu32", MASK_68020}, \
{ "align-int", MASK_ALIGN_INT }, \
{ "no-align-int", -MASK_ALIGN_INT }, \
***************
*** 1040,1046 ****
|| defined(__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
! || defined(__mc68332__) || defined(mc68332)
#define MACHINE_STATE_m68010_up
#endif
--- 1041,1047 ----
|| defined(__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
! || defined(__mcpu32__) || defined(mcpu32)
#define MACHINE_STATE_m68010_up
#endif
*** config/m68k/m68k-none.h Tue Aug 12 01:57:29 1997
--- config/m68k/m68k-none.h Tue Oct 21 17:12:45 1997
***************
*** 72,83 ****
#if TARGET_CPU_DEFAULT == M68K_CPU_m68302
#define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68302 } -D__mc68302 -D__mc68302__"
#define ASM_CPU_DEFAULT_SPEC "-mc68302"
! #define CC1_CPU_DEFAULT_SPEC "-m68000"
#else
#if TARGET_CPU_DEFAULT == M68K_CPU_m68332
! #define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68332 } -D__mc68332 -D__mc68332__"
#define ASM_CPU_DEFAULT_SPEC "-mc68332"
! #define CC1_CPU_DEFAULT_SPEC "-m68020 -mnobitfield %{!m68881:-msoft-float}"
#else
Unrecognized value in TARGET_CPU_DEFAULT.
#endif
--- 72,83 ----
#if TARGET_CPU_DEFAULT == M68K_CPU_m68302
#define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68302 } -D__mc68302 -D__mc68302__"
#define ASM_CPU_DEFAULT_SPEC "-mc68302"
! #define CC1_CPU_DEFAULT_SPEC "-m68302"
#else
#if TARGET_CPU_DEFAULT == M68K_CPU_m68332
! #define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68332 -Dmcpu32 } -D__mc68332 -D__mc68332__ -D__mcpu32 -D__mcpu32__"
#define ASM_CPU_DEFAULT_SPEC "-mc68332"
! #define CC1_CPU_DEFAULT_SPEC "-m68332"
#else
Unrecognized value in TARGET_CPU_DEFAULT.
#endif
***************
*** 92,103 ****
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmc68000"
! /* Define one of __HAVE_68881__, __HAVE_FPA__, or nothing (soft float), appropriately. */
#undef CPP_FPU_SPEC
#if TARGET_DEFAULT & MASK_68881
! /* ??? Why isn't m68302 treated like m68000 here? */
! #define CPP_FPU_SPEC \
! "%{!mc68000:%{!m68000:%{!m68332:%{!m5200:%{!msoft-float:%{mfpa:-D__HAVE_FPA__ }%{!mfpa:-D__HAVE_68881__ }}}}}}"
#else
/* This can't currently happen, but we code it anyway to show how it's done. */
#if TARGET_DEFAULT & MASK_FPA
--- 92,104 ----
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmc68000"
! /* Define one of __HAVE_68881__, __HAVE_FPA__, __HAVE_SKY__, or nothing
! (soft float), appropriately. */
#undef CPP_FPU_SPEC
#if TARGET_DEFAULT & MASK_68881
! #define CPP_FPU_SPEC "\
! %{!mc68000:%{!m68000:%{!m68302:%{!mcpu32:%{!m68332:%{!m5200:%{!msoft-float:%{!mno-68881:%{!mfpa:%{!msky:-D__HAVE_68881__ }}}}}}}}}} \
! %{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }"
#else
/* This can't currently happen, but we code it anyway to show how it's done. */
#if TARGET_DEFAULT & MASK_FPA
***************
*** 104,111 ****
#define CPP_FPU_SPEC \
"%{!msoft-float:%{m68881:-D__HAVE_68881__ }%{!m68881:-D__HAVE_FPA__ }}"
#else
! #define CPP_FPU_SPEC \
! "%{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }"
#endif
#endif
--- 105,112 ----
#define CPP_FPU_SPEC \
"%{!msoft-float:%{m68881:-D__HAVE_68881__ }%{!m68881:-D__HAVE_FPA__ }}"
#else
! #define CPP_FPU_SPEC "\
! %{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }"
#endif
#endif
***************
*** 120,127 ****
-m68040: define mc68040
-m68060: define mc68060
-m68020-40: define mc68020 mc68030 mc68040
! -m68302: define mc68302
! -m68332: define mc68332
-m5200: define mcf5200
default: define as above appropriately
--- 121,130 ----
-m68040: define mc68040
-m68060: define mc68060
-m68020-40: define mc68020 mc68030 mc68040
! -m68020-60: define mc68020 mc68030 mc68040 mc68060
! -m68302: define mc68302
! -m68332: define mc68332 mcpu32
! -mcpu32: define mcpu32
-m5200: define mcf5200
default: define as above appropriately
***************
*** 130,139 ****
#undef CPP_SPEC
#define CPP_SPEC "\
! %(cpp_fpu) \
! %{!ansi:%{m68010:-Dmc68010 }%{m68020:-Dmc68020 }%{mc68020:-Dmc68020 }%{m68030:-Dmc68030 }%{m68040:-Dmc68040 }%{m68020-40:-Dmc68020 -Dmc68030 -Dmc68040 }%{m68060:-Dmc68060 }%{m68302:-Dmc68302 }%{m68332:-Dmc68332 }%{m5200:-Dmcf5200 }} \
! %{m68010:-D__mc68010__ -D__mc68010 }%{m68020:-D__mc68020__ -D__mc68020 }%{mc68020:-D__mc68020__ -D__mc68020 }%{m68030:-D__mc68030__ -D__mc68030 }%{m68040:-D__mc68040__ -D__mc68040 }%{m68020-40:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 }%{mc68060:-D__mc68060__ -D__mc68060 }%{m68302:-D__mc68302__ -D__mc68302 }%{m68332:-D__mc68332__ -D__mc68332 }%{m5200:-D__mcf5200__ -D__mcf5200 } \
! %{!mc68000:%{!m68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68060:%{!m68302:%{!m68332:%{!m5200:%(cpp_cpu_default)}}}}}}}}}}}} \
%(cpp_subtarget) \
"
--- 133,141 ----
#undef CPP_SPEC
#define CPP_SPEC "\
! %(cpp_fpu)%{!ansi:%{m68302:-Dmc68302 }%{m68010:-Dmc68010 }%{m68020:-Dmc68020 }%{mc68020:-Dmc68020 }%{m68030:-Dmc68030 }%{m68040:-Dmc68040 }%{m68020-40:-Dmc68020 -Dmc68030 -Dmc68040 }%{m68020-60:-Dmc68020 -Dmc68030 -Dmc68040 -Dmc68060 }%{m68060:-Dmc68060 }%{mcpu32:-Dmcpu32 } %{m68332:-Dmc68332 -Dmcpu32 }%{m5200:-Dmcf5200 }} \
! %{m68302:-D__mc68302__ -D__mc68302 }%{m68010:-D__mc68010__ -D__mc68010 }%{m68020:-D__mc68020__ -D__mc68020 }%{mc68020:-D__mc68020__ -D__mc68020 }%{m68030:-D__mc68030__ -D__mc68030 }%{m68040:-D__mc68040__ -D__mc68040 }%{m68020-40:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 }%{m68020-60:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 -D__mc68060__ -D__mc68060 }%{m68060:-D__mc68060__ -D__mc68060 }%{mcpu32:-D__mcpu32__ -D__mcpu32 }%{m68332:-D__mc68332__ -D__mc68332 -D__mcpu32__ -D__mcpu32 }%{m5200:-D__mcf5200__ -D__mcf5200 } \
! %{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32: %{!m68332:%{!m5200:%(cpp_cpu_default)}}}}}}}}}}}}}} \
%(cpp_subtarget) \
"
***************
*** 141,158 ****
#undef ASM_SPEC
#define ASM_SPEC "\
! %{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 } \
! %{m68000}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040}%{m68060}%{m68302}%{m68332}%{m5200} \
! %{!mc68000:%{!m68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68060:%{!m68302:%{!m68332:%{!m5200:%(asm_cpu_default)}}}}}}}}}}}} \
"
#undef CC1_SPEC
! #define CC1_SPEC "\
! %{m68000:%{!m68881:-msoft-float }}%{m68302:-m68000 }%{m68332:-m68020 -mnobitfield %{!m68881:-msoft-float }} \
! "
! /* ??? Is this needed?
! %{!m68000:%{!mc68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68302:%{!m68332:%(cc1_cpu_default)}}}}}}}}}}
! */
/* This macro defines names of additional specifications to put in the specs
that can be used in various specifications like CC1_SPEC. Its definition
--- 143,157 ----
#undef ASM_SPEC
#define ASM_SPEC "\
! %{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 }%{m68000}%{m68302}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040 }%{m68020-60:-mc68040 }%{m68060}%{mcpu32}%{m68332}%{m5200}%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32:%{!m68332:%{!m5200:%(asm_cpu_default) }}}}}}}}}}}}}} \
"
+ /* cc1/cc1plus always receives all the -m flags. If the specs strings above
+ are consistent with the TARGET_OPTIONS flags in m68k.h, there should be no
+ need for any further cc1/cc1plus specs. */
+
#undef CC1_SPEC
! #define CC1_SPEC ""
/* This macro defines names of additional specifications to put in the specs
that can be used in various specifications like CC1_SPEC. Its definition
*** config/m68k/t-m68kbare Tue Aug 12 01:57:30 1997
--- config/m68k/t-m68kbare Wed Oct 22 10:41:43 1997
***************
*** 15,24 ****
echo '#define EXTFLOAT' > xfgnulib.c
cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c
! MULTILIB_OPTIONS = m68000/m68020/m5200 m68881/msoft-float
MULTILIB_DIRNAMES =
! MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 m68000=m68332 m68020=mc68020 m68020=m68040
! MULTILIB_EXCEPTIONS = *m5200/*m68881 *m5200/*msoft-float
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
--- 15,24 ----
echo '#define EXTFLOAT' > xfgnulib.c
cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c
! MULTILIB_OPTIONS = m68000/m68020/m5200/mcpu32 m68881/msoft-float
MULTILIB_DIRNAMES =
! MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 mcpu32=m68332 m68020=mc68020 m68020=m68040 m68020=m68060
! MULTILIB_EXCEPTIONS = m68000/msoft-float m5200/m68881 m5200/msoft-float mcpu32/m68881 mcpu32/msoft-float
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
*** longlong.h Wed Sep 10 17:50:20 1997
--- longlong.h Tue Oct 21 17:40:53 1997
***************
*** 488,494 ****
#if defined (__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
! || defined(__mc68332__) || defined(mc68332) \
|| defined(__NeXT__)
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mulu%.l %3,%1:%0" \
--- 488,494 ----
#if defined (__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \
! || defined(__mcpu32__) || defined(mcpu32) \
|| defined(__NeXT__)
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mulu%.l %3,%1:%0" \
*** invoke.texi Fri Oct 24 13:38:40 1997
--- invoke.texi Wed Oct 22 17:18:37 1997
***************
*** 203,209 ****
@smallexample
@emph{M680x0 Options}
-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040
! -m68060 -m5200 -m68881 -mbitfield -mc68000 -mc68020 -mfpa
-mnobitfield -mrtd -mshort -msoft-float -malign-int
@emph{VAX Options}
--- 203,209 ----
@smallexample
@emph{M680x0 Options}
-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040
! -m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 -mfpa
-mnobitfield -mrtd -mshort -msoft-float -malign-int
@emph{VAX Options}
***************
*** 2829,2834 ****
--- 2829,2837 ----
Generate output for a 68000. This is the default
when the compiler is configured for 68000-based systems.
+ Use this option for microcontrollers with a 68000 or EC000 core,
+ including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+
@item -m68020
@itemx -mc68020
Generate output for a 68020. This is the default
***************
*** 2848,2855 ****
configured for 68040-based systems.
This option inhibits the use of 68881/68882 instructions that have to be
! emulated by software on the 68040. If your 68040 does not have code to
! emulate those instructions, use @samp{-m68040}.
@item -m68060
Generate output for a 68060. This is the default when the compiler is
--- 2851,2858 ----
configured for 68040-based systems.
This option inhibits the use of 68881/68882 instructions that have to be
! emulated by software on the 68040. Use this option if your 68040 does not
! have code to emulate those instructions.
@item -m68060
Generate output for a 68060. This is the default when the compiler is
***************
*** 2856,2869 ****
configured for 68060-based systems.
This option inhibits the use of 68020 and 68881/68882 instructions that
! have to be emulated by software on the 68060. If your 68060 does not
! have code to emulate those instructions, use @samp{-m68060}.
@item -m5200
Generate output for a 520X "coldfire" family cpu. This is the default
when the compiler is configured for 520X-based systems.
@item -m68020-40
Generate output for a 68040, without using any of the new instructions.
This results in code which can run relatively efficiently on either a
--- 2859,2883 ----
configured for 68060-based systems.
This option inhibits the use of 68020 and 68881/68882 instructions that
! have to be emulated by software on the 68060. Use this option if your 68060
! does not have code to emulate those instructions.
+ @item -mcpu32
+ Generate output for a CPU32. This is the default
+ when the compiler is configured for CPU32-based systems.
+
+ Use this option for microcontrollers with a
+ CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
+ 68336, 68340, 68341, 68349 and 68360.
+
@item -m5200
Generate output for a 520X "coldfire" family cpu. This is the default
when the compiler is configured for 520X-based systems.
+ Use this option for microcontroller with a 5200 core, including
+ the MCF5202, MCF5203, MCF5204 and MCF5202.
+
@item -m68020-40
Generate output for a 68040, without using any of the new instructions.
This results in code which can run relatively efficiently on either a
***************
*** 2892,2899 ****
Consider type @code{int} to be 16 bits wide, like @code{short int}.
@item -mnobitfield
! Do not use the bit-field instructions. The @samp{-m68000} option
! implies @w{@samp{-mnobitfield}}.
@item -mbitfield
Do use the bit-field instructions. The @samp{-m68020} option implies
--- 2906,2913 ----
Consider type @code{int} to be 16 bits wide, like @code{short int}.
@item -mnobitfield
! Do not use the bit-field instructions. The @samp{-m68000}, @samp{-mcpu32}
! and @samp{-m5200} options imply @w{@samp{-mnobitfield}}.
@item -mbitfield
Do use the bit-field instructions. The @samp{-m68020} option implies
***************
*** 2921,2927 ****
harmlessly ignored.)
The @code{rtd} instruction is supported by the 68010, 68020, 68030,
! 68040, and 68060 processors, but not by the 68000 or 5200.
@item -malign-int
@itemx -mno-align-int
--- 2935,2941 ----
harmlessly ignored.)
The @code{rtd} instruction is supported by the 68010, 68020, 68030,
! 68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
@item -malign-int
@itemx -mno-align-int
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