Re: More info on alpha bug

[Jim Wilson <wilson@cygnus.com>]

	Mon Oct 27 18:18:00 1997  Richard Henderson  <rth@cygnus.com>

	* reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of
	DEST for the spill, adjust mode of SRC to compensate.

This patch looks OK to me.

	In this example, the above code kicks in and widens the destination of
	the store, but the source stays in SImode.  This leads to 

	  (set (mem:DI (plus (reg $30) (const_int 120)))
	       (reg:SI $1)))

	which somehow fails to choke the backend and yields an SImode store in
	the assembly.

Yes, that is wierd.  I looked at it out of curiousity.  It can fail only
if we try to recognize the instruction.  However, the instruction had already
been recognized (as movdf+1) before reload ran, and reload does not bother to
re-recognize an instruction when performing simple reloads on them, hence we
never notice the problem.

	I don't know if this is better or worse than adjusting the mode of SRC
	directly, but I have the idea that the size of references to registers
	should be consistent one to the next, with subreg thrown in if necessary
	to hide the differences.

Pseudos are represented by a unique RTX, and hence have a fixed mode.  If
you need a different mode for a pseudo, you must use a SUBREG.  Hard registers
can be represented by multiple RTXes, and can have any mode allowed by
HARD_REGNO_MODE_OK.  If you have a hard register, then creating a SUBREG is
not necessary.  Creating a SUBREG for a hard register should be harmless
though.

Jim