* bit overflow in hard_regno_mode_ok[] for i960
@ 1998-04-11 9:32 Greg McGary
0 siblings, 0 replies; only message in thread
From: Greg McGary @ 1998-04-11 9:32 UTC (permalink / raw)
To: egcs
Sat Apr 11 08:23:51 1998 Greg McGary <gkm@gnu.org>
* i960.h (hard_regno_mode_ok): Changed to function from array of
unsigned. (HARD_REGNO_MODE_OK): Call function instead of testing bit.
* i960.c (hard_regno_mode_ok): Changed to function from array of
unsigned. The number of modes exceeds 32, so mode flag bits no
longer fit.
Index: config/i960/i960.h
===================================================================
RCS file: /home/cvsroot/tools/egcs/gcc/config/i960/i960.h,v
retrieving revision 1.2
diff -u -p -r1.2 i960.h
--- i960.h 1998/04/10 06:33:11 1.2
+++ i960.h 1998/04/11 15:33:28
@@ -510,9 +510,8 @@ extern int target_flags;
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
On 80960, the cpu registers can hold any mode but the float registers
can only hold SFmode, DFmode, or XFmode. */
-extern unsigned int hard_regno_mode_ok[FIRST_PSEUDO_REGISTER];
-#define HARD_REGNO_MODE_OK(REGNO, MODE) \
- ((hard_regno_mode_ok[REGNO] & (1 << (int) (MODE))) != 0)
+extern int hard_regno_mode_ok ();
+#define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok ((REGNO), (MODE))
/* Value is 1 if it is a good idea to tie two pseudo registers
when one has mode MODE1 and one has mode MODE2.
Index: config/i960/i960.c
===================================================================
RCS file: /home/cvsroot/tools/egcs/gcc/config/i960/i960.c,v
retrieving revision 1.2
diff -u -p -r1.2 i960.c
--- i960.c 1998/04/10 06:33:11 1.2
+++ i960.c 1998/04/11 15:33:25
@@ -2072,40 +2072,57 @@ i960_alignment (size, align)
}
#endif
\f
-/* Modes for condition codes. */
-#define C_MODES \
- ((1 << (int) CCmode) | (1 << (int) CC_UNSmode) | (1<< (int) CC_CHKmode))
-
-/* Modes for single-word (and smaller) quantities. */
-#define S_MODES \
- (~C_MODES \
- & ~ ((1 << (int) DImode) | (1 << (int) TImode) \
- | (1 << (int) DFmode) | (1 << (int) XFmode)))
-
-/* Modes for double-word (and smaller) quantities. */
-#define D_MODES \
- (~C_MODES \
- & ~ ((1 << (int) TImode) | (1 << (int) XFmode)))
-
-/* Modes for quad-word quantities. */
-#define T_MODES (~C_MODES)
-
-/* Modes for single-float quantities. */
-#define SF_MODES ((1 << (int) SFmode))
-
-/* Modes for double-float quantities. */
-#define DF_MODES (SF_MODES | (1 << (int) DFmode) | (1 << (int) SCmode))
-
-/* Modes for quad-float quantities. */
-#define XF_MODES (DF_MODES | (1 << (int) XFmode) | (1 << (int) DCmode))
-
-unsigned int hard_regno_mode_ok[FIRST_PSEUDO_REGISTER] = {
- T_MODES, S_MODES, D_MODES, S_MODES, T_MODES, S_MODES, D_MODES, S_MODES,
- T_MODES, S_MODES, D_MODES, S_MODES, T_MODES, S_MODES, D_MODES, S_MODES,
- T_MODES, S_MODES, D_MODES, S_MODES, T_MODES, S_MODES, D_MODES, S_MODES,
- T_MODES, S_MODES, D_MODES, S_MODES, T_MODES, S_MODES, D_MODES, S_MODES,
- XF_MODES, XF_MODES, XF_MODES, XF_MODES, C_MODES};
+int
+hard_regno_mode_ok (regno, mode)
+ int regno;
+ enum machine_mode mode;
+{
+ if (regno < 32)
+ {
+ switch (mode)
+ {
+ case CCmode: case CC_UNSmode: case CC_CHKmode:
+ return 0;
+
+ case DImode: case DFmode:
+ return (regno & 1) == 0;
+
+ case TImode: case XFmode:
+ return (regno & 3) == 0;
+
+ default:
+ return 1;
+ }
+ }
+ else if (regno >= 32 && regno < 36)
+ {
+ switch (mode)
+ {
+ case SFmode: case DFmode: case XFmode:
+ case SCmode: case DCmode:
+ return 1;
+
+ default:
+ return 0;
+ }
+ }
+ else if (regno == 36)
+ {
+ switch (mode)
+ {
+ case CCmode: case CC_UNSmode: case CC_CHKmode:
+ return 1;
+
+ default:
+ return 0;
+ }
+ }
+ else if (regno == 37)
+ return 0;
+
+ abort ();
+}
\f
/* Return the minimum alignment of an expression rtx X in bytes. This takes
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~1998-04-11 9:32 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
1998-04-11 9:32 bit overflow in hard_regno_mode_ok[] for i960 Greg McGary
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).