From: Richard Henderson <rth@cygnus.com>
To: Joern Rennecke <amylaar@cygnus.co.uk>
Cc: Jim Wilson <wilson@cygnus.com>, rth@cygnus.com, egcs@cygnus.com
Subject: Re: alpha failure on 920810-1
Date: Wed, 29 Apr 1998 22:57:00 -0000 [thread overview]
Message-ID: <19980429225753.08852@dot.cygnus.com> (raw)
In-Reply-To: <199804292113.WAA32444@phal.cygnus.co.uk>
On Wed, Apr 29, 1998 at 10:13:05PM +0100, Joern Rennecke wrote:
> If it tests only if all bits are zero, I think we should express this
> as a DImode equality test to zero:
>
> (set (reg:DF 1)
> (eq:DF (reg:DF 2) (reg:DF 3)))
> (set (reg:DF 4)
> (if_then_else:DF (eq (subreg:DI (reg:DF 1) 0)
> (const_int 0))
> (reg:DF 5)
> (reg:DF 4)))
Unfortunately that is not the whole truth. I read the fine print
last night and found that it handles -0.0 specially, so it is not
really a DImode compare. Which is unfortunate, since I'd like to
be able to do real DImode comparisons with them...
In conversation with Jim today, we decided that
(set (reg:DF 1) (eq:DF (reg:DF 2) (reg:DF 3)))
(set (reg:DF 4)
(if_then_else:DF (eq:CC (reg:DF 1) (const_int 0))
(reg:DF 5) (reg:DF 4)))
is a reasonable compromise. It turns out that combine already knows
that it can't do anything with CCmode compares, and with my previous
patch modified just a tad, that takes care of loop, jump, and cse.
I've bootstrapped succesfully with these changes, and am currently
running Spec95. Patches will follow once no regressions are shown.
r~
next prev parent reply other threads:[~1998-04-29 22:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
1998-04-27 1:41 Richard Henderson
1998-04-27 8:47 ` Joern Rennecke
1998-04-27 13:59 ` Richard Henderson
1998-04-28 22:14 ` Jim Wilson
1998-04-29 2:20 ` Richard Henderson
1998-04-29 12:27 ` Jim Wilson
1998-04-29 16:08 ` Joern Rennecke
1998-04-29 22:57 ` Richard Henderson [this message]
1998-04-30 10:25 ` Joern Rennecke
1998-04-30 13:20 ` Richard Henderson
1998-04-30 22:29 ` Richard Henderson
1998-05-08 16:08 ` Jeffrey A Law
1998-05-09 2:05 ` Richard Henderson
1998-05-06 23:49 ` Jeffrey A Law
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