From mboxrd@z Thu Jan 1 00:00:00 1970 From: john@feith.com (John Wehle) To: law@cygnus.com Cc: egcs@cygnus.com Subject: Re: Performance measurements Date: Sat, 27 Jun 1998 15:52:00 -0000 Message-id: <199806272148.RAA21864@jwlab.FEITH.COM> X-SW-Source: 1998-06/msg01011.html > Here's some more info. PPro200 > > egcs-1.0.3 69.96 > today's sources 70.40 > > Note I get 73.14 if I remove all the various -malign switches. > > Not particularly good. Can someone look into this? It might > be another case of double alignment losing badly. I don't know > x86 issues well enough. Part of the problem is due to loop turning: (insn 73 71 74 (set (reg:DF 49) (mem/s:DF (plus:SI (plus:SI (mult:SI (reg/v:SI 29) (const_int 8)) (reg/v:SI 21)) (const_int 16)))) 74 {movdf+1} (nil) (nil)) (insn 74 73 75 (set (reg:DF 50) (mult:DF (reg:DF 48) (reg:DF 49))) 360 {ffshi_1+1} (nil) (nil)) into: (insn 73 69 74 (set (reg:DF 49) (mem/s:DF (reg:SI 104))) -1 (nil) (nil)) (insn 74 73 75 (set (reg:DF 50) (mult:DF (reg:DF 48) (reg:DF 49))) -1 (nil) (nil)) which global register allocation turns into: (insn 295 298 74 (set (reg:SI 2 %ecx) (mem:SI (plus:SI (reg:SI 7 %esp) (const_int 16)))) -1 (nil) (nil)) (insn:HI 74 295 75 (set (reg:DF 9 %st(1)) (mult:DF (reg:DF 9 %st(1)) (mem/s:DF (reg:SI 2 %ecx)))) 360 {ffshi_1+1} (nil) (nil)) because it had to spill (reg:SI 104) since the Intel 386 is a register poor machine. Defining DONT_REDUCE_ADDR when builting egcs results in: (insn:HI 74 379 75 (set (reg:DF 9 %st(1)) (mult:DF (reg:DF 9 %st(1)) (mem/s:DF (plus:SI (plus:SI (mult:SI (reg/v:SI 0 %eax) (const_int 8)) (reg:SI 2 %ecx)) (const_int 16))))) 360 {ffshi_1+1} (nil) (nil)) after global register allocation. The corresponding benchmark results on a 233 MHz Pentium II running FreeBSD 3.0 are: egcs-19980621 aout: 87.91 MFLOPS egcs-19980621 elf: 86.85 MFLOPS egcs-19980621 DONT_REDUCE_ADDR aout: 105.24 MFLOPS egcs-19980621 DONT_REDUCE_ADDR elf: 105.24 MFLOPS Possible solutions: 1) Don't call find_mem_givs if SMALL_REGISTER_CLASSES. 2) Don't consider the giv if SMALL_REGISTER_CLASSES and it's a valid memory address for the machine. 3) Consider the giv but don't take an action which will result in a new register / (more registers then before) if SMALL_REGISTER_CLASSES and the giv is a valid memory address for the machine. BTW, I'm pulling these solutions out of thin air as I'm not up to speed with the operation of loop. -- John ------------------------------------------------------------------------- | Feith Systems | Voice: 1-215-646-8000 | Email: john@feith.com | | John Wehle | Fax: 1-215-540-5495 | | -------------------------------------------------------------------------