From mboxrd@z Thu Jan 1 00:00:00 1970 From: mike stump To: amylaar@onetel.net.uk, thomascanny@yahoo.co.nz Cc: gcc@gcc.gnu.org Subject: Re: GCC Date: Wed, 19 Sep 2001 10:50:00 -0000 Message-id: <200109191749.KAA16965@kankakee.wrs.com> X-SW-Source: 2001-09/msg00762.html > From: Joern Rennecke > To: thomascanny@yahoo.co.nz (=?iso-8859-1?q?thomas=20joseph?=) > Date: Wed, 19 Sep 2001 15:05:21 +0100 (BST) > Lack of a proper stack would be a more serious problem, Isn't this inconsequential? One can always dummy up a stack trough convention, just as one dummies up more registers through convention. In fact, don't most risc cpu do exactly this anyway? [ thumbing through my mips book ] I don't see any mention of a stack anywhere in my mips book. Doesn't seem to be a problem in the least. :-)