instruction sync -- need to preserve order

instruction sync -- need to preserve order

[Rayson Ho]

Hi,

How can I make sure that gcc does not schedule instructions across a
memory barrier?? I am porting a threads library from AIX to PPC Linux,
and on AIX, the compiler has a build-in instruction that allows me to
do that.

Thanks,
Rayson



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Re: instruction sync -- need to preserve order

[Geoff Keating]

Rayson Ho <raysonlogin@yahoo.com> writes:

> Hi,
> 
> How can I make sure that gcc does not schedule instructions across a
> memory barrier?? I am porting a threads library from AIX to PPC Linux,
> and on AIX, the compiler has a build-in instruction that allows me to
> do that.

What you really want to do is specify to GCC that the memory barrier
affects memory, like this (assuming the barrier you're using is the
"sync" instruction):

  asm ("sync" : : : "memory");

Instructions that don't affect memory will still be scheduled across
it, but memory will be consistent.

-- 
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>