From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22125 invoked by alias); 23 Dec 2001 14:59:58 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 22104 invoked from network); 23 Dec 2001 14:59:58 -0000 Received: from unknown (HELO nile.gnat.com) (205.232.38.5) by sources.redhat.com with SMTP; 23 Dec 2001 14:59:58 -0000 Received: by nile.gnat.com (Postfix, from userid 338) id 15F7EF28C6; Sun, 23 Dec 2001 09:59:54 -0500 (EST) From: dewar@gnat.com To: dewar@gnat.com, fw@deneb.enyo.de Subject: Re: Big-endian Gcc on Intel IA32 Cc: gcc@gcc.gnu.org, torvalds@transmeta.com Message-Id: <20011223145954.15F7EF28C6@nile.gnat.com> Date: Sun, 23 Dec 2001 07:06:00 -0000 X-SW-Source: 2001-12/txt/msg01248.txt.bz2 <> Yes, I already suggested this, and noted that this was what we did in Realia COBOL (see archives) <> There are no S&M machines, so this is bogus. There are 1's complement machines but the issue is not affected by 1s or 2s complement. Even for S&M, the sign bit was always the most significant, so you are inventing a non-existant problem here. <>> The point is that it is quite straightforward to address the problem WITHIN an address unit. Ada already does this. Have a look at what GNAT implements here with the Bit_Order attribute (and also see the discussion of why it is not easy to do more). This is in the GNAT RM.