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* (something of an absence of) SSE2 documentation
@ 2002-02-05  4:01 Tom Womack
  2002-02-05  7:16 ` Jan Hubicka
  0 siblings, 1 reply; 4+ messages in thread
From: Tom Womack @ 2002-02-05  4:01 UTC (permalink / raw)
  To: gcc

Hi.

In what section of which manual ought the asm() constraints for SSE
registers to be documented? They somehow fall between the cracks;
I was expecting to find the documentation in a "machine-specific"
section under "extended assembly" in info gcc. It wouldn't make
sense to document them in info as, they're very much gcc constructs.

I ended up guessing that the information might be in gcc/config/i386.h,
which told me the letters

x  SSE registers
y  MMX registers
Y  'SSE2' registers

but I don't see what the distinction between SSE and SSE2 _registers_ is
supposed to be; the SSE and SSE2 operations all act on the same
set of eight registers.

Looking through i386.md, "Y" constraints are associated with DF and
V2DF-mode instructions, and there seems to be really very little handling at
all of the SSE2 extended-MMX instructions, which use operands of type V16QI,
V8HI, V4SI and V2DI.

Even some SSE2 operations are missing entirely -- SQRTPD and MAXPD, for
instance; to make them used, would I have to do anything beyond copying the
define_insn for the PS variants, checking TARGET_SSE2 rather than
TARGET_SSE, and changing "xm" to "Ym" and "v4sf" to "v2df"?

Tom

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: (something of an absence of) SSE2 documentation
  2002-02-05  4:01 (something of an absence of) SSE2 documentation Tom Womack
@ 2002-02-05  7:16 ` Jan Hubicka
  2002-02-06  1:50   ` Tom Womack
  0 siblings, 1 reply; 4+ messages in thread
From: Jan Hubicka @ 2002-02-05  7:16 UTC (permalink / raw)
  To: Tom Womack; +Cc: gcc, rth

> Hi.
> 
> In what section of which manual ought the asm() constraints for SSE
> registers to be documented? They somehow fall between the cracks;
> I was expecting to find the documentation in a "machine-specific"
> section under "extended assembly" in info gcc. It wouldn't make
> sense to document them in info as, they're very much gcc constructs.

It is documented in the Constraints section of manual, as any other
constraints are.  You seems to be using old version of manual, please
use one distributed with snapshots.
> 
> I ended up guessing that the information might be in gcc/config/i386.h,
> which told me the letters
> 
> x  SSE registers
> y  MMX registers
> Y  'SSE2' registers

You may use 'x' for SSE registers. 'Y' is used just internally.

> 
> but I don't see what the distinction between SSE and SSE2 _registers_ is
> supposed to be; the SSE and SSE2 operations all act on the same
> set of eight registers.

The difference is that when SSE2 is not available 'Y' is ignored, so we
can easilly write mixed paterns for x87 and SSE2 instructions that will
pick the variants.
It is internal to gcc only.

For writing SSE code in sources, the Intel style builtins are the way to go.
They map 1-1 to ones documented in Intel manual, but you need to include
special header in order to get the types defined and Intel-like names
instead of __buildin_xxx
> 
> Looking through i386.md, "Y" constraints are associated with DF and
> V2DF-mode instructions, and there seems to be really very little handling at
> all of the SSE2 extended-MMX instructions, which use operands of type V16QI,
> V8HI, V4SI and V2DI.

The SSE2 intriscs are not supported yet, as long as I remember.  You do have
support for SSE/MMX/3dNOW intrics contributed by Bernd and for SSE/SSE2 fp
arithmetcs contributed by me.  SSE2 intriscs are probably being worked on.
I expected them to happen before 3.1 freeze, but it don't appears to be the
case, sadly :(

Honza

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: (something of an absence of) SSE2 documentation
  2002-02-05  7:16 ` Jan Hubicka
@ 2002-02-06  1:50   ` Tom Womack
  2002-02-06  3:25     ` Jan Hubicka
  0 siblings, 1 reply; 4+ messages in thread
From: Tom Womack @ 2002-02-06  1:50 UTC (permalink / raw)
  To: Jan Hubicka; +Cc: gcc

> > Hi.
> >
> > In what section of which manual ought the asm() constraints for SSE
> > registers to be documented? They somehow fall between the cracks;
> > I was expecting to find the documentation in a "machine-specific"
> > section under "extended assembly" in info gcc. It wouldn't make
> > sense to document them in info as, they're very much gcc constructs.
>
> It is documented in the Constraints section of manual, as any other
> constraints are.  You seems to be using old version of manual, please
> use one distributed with snapshots.

No, I'm using the one distributed with the snapshots; I had expected to find
"constraints" as a subsection of "Extended Asm" and, not seeing it there,
didn't think of looking at the next level up.

> The SSE2 intrinsics are not supported yet, as long as I remember.

Indeed not, as I look in i386/i386.c. And when I tried defining one by hand,
I hit the ICE I've just reported to the list

Tom

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: (something of an absence of) SSE2 documentation
  2002-02-06  1:50   ` Tom Womack
@ 2002-02-06  3:25     ` Jan Hubicka
  0 siblings, 0 replies; 4+ messages in thread
From: Jan Hubicka @ 2002-02-06  3:25 UTC (permalink / raw)
  To: Tom Womack; +Cc: Jan Hubicka, gcc

> > > Hi.
> > >
> > > In what section of which manual ought the asm() constraints for SSE
> > > registers to be documented? They somehow fall between the cracks;
> > > I was expecting to find the documentation in a "machine-specific"
> > > section under "extended assembly" in info gcc. It wouldn't make
> > > sense to document them in info as, they're very much gcc constructs.
> >
> > It is documented in the Constraints section of manual, as any other
> > constraints are.  You seems to be using old version of manual, please
> > use one distributed with snapshots.
> 
> No, I'm using the one distributed with the snapshots; I had expected to find
> "constraints" as a subsection of "Extended Asm" and, not seeing it there,

The constrains are described in the Machine Description chapter of manual
and just linked from the extended asm page.

> didn't think of looking at the next level up.
> 
> > The SSE2 intrinsics are not supported yet, as long as I remember.
> 
> Indeed not, as I look in i386/i386.c. And when I tried defining one by hand,
> I hit the ICE I've just reported to the list

You should not get ICE anyway.  Lets sort out the issues, since time is getting
short.  We do have problems with
1) performance issues of -march=pentium4
   I will prepare the register ordering patch today and send you for experimentation
2) lack of good documentation for various SSE options
3) lack of support for SSE2 instrics
4) ICEs when using the existing intrics?
5) lack of stack alignment code.

Honza
> 
> Tom

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2002-02-06 11:18 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2002-02-05  4:01 (something of an absence of) SSE2 documentation Tom Womack
2002-02-05  7:16 ` Jan Hubicka
2002-02-06  1:50   ` Tom Womack
2002-02-06  3:25     ` Jan Hubicka

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