From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3727 invoked by alias); 26 Jan 2003 15:36:52 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 3720 invoked from network); 26 Jan 2003 15:36:51 -0000 Received: from unknown (HELO fencepost.gnu.org) (199.232.76.164) by 172.16.49.205 with SMTP; 26 Jan 2003 15:36:51 -0000 Received: from monty-python.gnu.org ([199.232.76.173]) by fencepost.gnu.org with esmtp (Exim 4.10) id 18coq3-0001Qk-00 for gcc@gnu.org; Sun, 26 Jan 2003 10:36:51 -0500 Received: from mail by monty-python.gnu.org with spam-scanned (Exim 4.10.13) id 18copn-0005rU-00 for gcc@gnu.org; Sun, 26 Jan 2003 10:36:36 -0500 Received: from du-069-1007.access.clara.net ([217.158.170.244] helo=north-pole.nickc.cambridge.redhat.com) by monty-python.gnu.org with esmtp (Exim 4.10.13) id 18copa-0005Lk-00 for gcc@gnu.org; Sun, 26 Jan 2003 10:36:22 -0500 Received: by north-pole.nickc.cambridge.redhat.com (Postfix, from userid 500) id C79681BD35; Thu, 23 Jan 2003 14:02:43 +0000 (GMT) From: Nick Clifton To: Richard.Earnshaw@arm.com Cc: eric2work@yahoo.com, gcc@gnu.org, ericdejong@gmx.net In-reply-to: <200301231111.h0NBB7h28534@pc960.cambridge.arm.com> (message from Richard Earnshaw on Thu, 23 Jan 2003 11:11:04 +0000) Subject: Re: ARM interrupts References: <200301231111.h0NBB7h28534@pc960.cambridge.arm.com> Message-Id: <20030123140243.C79681BD35@north-pole.nickc.cambridge.redhat.com> Date: Sun, 26 Jan 2003 20:31:00 -0000 X-Spam-Status: No, hits=-2.7 required=5.0 tests=DATE_IN_PAST_48_96,IN_REP_TO,REFERENCES,SPAM_PHRASE_03_05 version=2.41 X-Spam-Level: X-SW-Source: 2003-01/txt/msg01285.txt.bz2 Hi Richard, : Sorry, but this is just gross. Interrupt functions shouldn't even : be trying to produce APCS-style framed entry sequences. Agreed - although you can always use the -fomit-frame-pointer switch. But then I also agree with your earlier comment about the fact that you should not be using the compiler to create interrupt handlers in the first place - they should be hand coded. The point about the patch is that with it applied the compiler should now produce working code for an interrupt handler, even if it is not optimal. Of course I have only inspected the code generated by eye - I have not run it on real ARM hardware, hence I was asking Eric to test/verify the patch before I applied it. Cheers Nick