From: David Edelsohn <dje@watson.ibm.com>
To: Segher Boessenkool <segher@koffie.nl>,
Roger Sayle <roger@www.eyesopen.com>
Cc: gcc@gcc.gnu.org
Subject: Re: Strange conditional jumps on the POWER4
Date: Mon, 07 Apr 2003 23:03:00 -0000 [thread overview]
Message-ID: <200304072232.SAA31696@makai.watson.ibm.com> (raw)
In-Reply-To: Message from Segher Boessenkool <segher@koffie.nl> of "Sun, 06 Apr 2003 07:27:45 +0200." <3E8FBAD1.6010405@koffie.nl>
>>>>> Segher Boessenkool writes:
>> With gcc-3.4 -O2 -ffast-math:
>> N7 assignments 3.00000000000000000 137.619 7.720
>> With gcc-3.4 -O2 -ffast-math -mcpu=power4
>> N7 assignments 3.00000000000000000 88.334 12.090
Segher> That last one looks very bad, too. Could you post source
Segher> and asm snippets for that?
The N7 performance difference is due to an unfortunate instruction
address alignment. The default processor model just happens to align the
N7 loop well and the Power4 model aligns it poorly. The AIX assembler
does not understand .p2align to allow GCC to generate alignment
directives to improve this. However, using
-ffunction-sections -fdata-sections
allows the AIX linker to lay out the functions more effectively, also
producing better alignments, recovering most of the performance.
David
next prev parent reply other threads:[~2003-04-07 22:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-05 21:26 Roger Sayle
2003-04-06 1:42 ` Zack Weinberg
2003-04-06 1:59 ` Roger Sayle
2003-04-06 3:33 ` David Edelsohn
2003-04-06 5:21 ` Roger Sayle
2003-04-06 16:49 ` Segher Boessenkool
2003-04-07 23:03 ` David Edelsohn [this message]
2003-04-06 15:14 ` David Edelsohn
[not found] <200304080131.VAA30506@makai.watson.ibm.com>
2003-04-08 15:50 ` Roger Sayle
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