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* impact of -minsert-sched-nops
@ 2003-11-24 20:14 Jack Howarth
  2003-11-24 20:27 ` David Edelsohn
  2003-11-24 21:52 ` Jack Howarth
  0 siblings, 2 replies; 13+ messages in thread
From: Jack Howarth @ 2003-11-24 20:14 UTC (permalink / raw)
  To: gcc

   Does anyone know what the impact is of using -minsert-sched-nops
on a non-Power4 processor? That is if I compile some fortran with
-minsert-sched-nops on g77 for use on a G5, will the same code work
properly on a G4 as well? Thanks in advance for any clarifications.
                       Jack

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 20:14 impact of -minsert-sched-nops Jack Howarth
@ 2003-11-24 20:27 ` David Edelsohn
  2003-11-25 11:07   ` Gabriel Paubert
  2003-11-24 21:52 ` Jack Howarth
  1 sibling, 1 reply; 13+ messages in thread
From: David Edelsohn @ 2003-11-24 20:27 UTC (permalink / raw)
  To: Jack Howarth; +Cc: gcc

>>>>> Jack Howarth writes:

Jack> Does anyone know what the impact is of using -minsert-sched-nops
Jack> on a non-Power4 processor? That is if I compile some fortran with
Jack> -minsert-sched-nops on g77 for use on a G5, will the same code work
Jack> properly on a G4 as well? Thanks in advance for any clarifications.

	Yes, the NOPs have no effect on G4 processors.  It's the normal
PowerPC NOP instruction.

	However, targeting G5 may generate some other new instructions.
If one does not specify G5 processor, then GCC does not know what
instructions need special group.  Catch-22, unfortunately.

David

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 20:14 impact of -minsert-sched-nops Jack Howarth
  2003-11-24 20:27 ` David Edelsohn
@ 2003-11-24 21:52 ` Jack Howarth
  2003-11-24 22:03   ` David Edelsohn
  2003-11-25  2:23   ` Jack Howarth
  1 sibling, 2 replies; 13+ messages in thread
From: Jack Howarth @ 2003-11-24 21:52 UTC (permalink / raw)
  To: David Edelsohn; +Cc: gcc

David,
   Well, as I understood it, the -minsert-sched-nops feature could be
enabled through either -mcpu=970 or -mcpu=G5 or -mcpu=power4 (which
would make the code G5 specific) or just through -minsert-sched-nops
which would limit the change to that optimization leaving the code
G4 compatible. Or am I missing something here?
                Jack

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 21:52 ` Jack Howarth
@ 2003-11-24 22:03   ` David Edelsohn
  2003-11-24 22:49     ` Geoff Keating
  2003-11-25  2:23   ` Jack Howarth
  1 sibling, 1 reply; 13+ messages in thread
From: David Edelsohn @ 2003-11-24 22:03 UTC (permalink / raw)
  To: Jack Howarth; +Cc: gcc

>>>>> Jack Howarth writes:

Jack> Well, as I understood it, the -minsert-sched-nops feature could be
Jack> enabled through either -mcpu=970 or -mcpu=G5 or -mcpu=power4 (which
Jack> would make the code G5 specific) or just through -minsert-sched-nops
Jack> which would limit the change to that optimization leaving the code
Jack> G4 compatible. Or am I missing something here?

	-minsert-sched-nops *always* is compatible.

	The issue is what heuristic should GCC use to insert nops if it
doesn't know it's targeting G5/POWER4?  G4 doesn't have group dispatch
restrictions. 

David

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 22:03   ` David Edelsohn
@ 2003-11-24 22:49     ` Geoff Keating
  0 siblings, 0 replies; 13+ messages in thread
From: Geoff Keating @ 2003-11-24 22:49 UTC (permalink / raw)
  To: David Edelsohn; +Cc: gcc

David Edelsohn <dje@watson.ibm.com> writes:

> >>>>> Jack Howarth writes:
> 
> Jack> Well, as I understood it, the -minsert-sched-nops feature could be
> Jack> enabled through either -mcpu=970 or -mcpu=G5 or -mcpu=power4 (which
> Jack> would make the code G5 specific) or just through -minsert-sched-nops
> Jack> which would limit the change to that optimization leaving the code
> Jack> G4 compatible. Or am I missing something here?
> 
> 	-minsert-sched-nops *always* is compatible.
> 
> 	The issue is what heuristic should GCC use to insert nops if it
> doesn't know it's targeting G5/POWER4?  G4 doesn't have group dispatch
> restrictions. 

-mtune=G5 should have the same effect as -mcpu=G5 for these purposes.
[I don't know if it does; but it's a bug if it doesn't.]

-- 
- Geoffrey Keating <geoffk@geoffk.org>

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 21:52 ` Jack Howarth
  2003-11-24 22:03   ` David Edelsohn
@ 2003-11-25  2:23   ` Jack Howarth
  1 sibling, 0 replies; 13+ messages in thread
From: Jack Howarth @ 2003-11-25  2:23 UTC (permalink / raw)
  To: David Edelsohn; +Cc: gcc

David,
    From reading the patch, I thought the default was mode 2 which
is for the power4?

http://gcc.gnu.org/ml/gcc-patches/2003-10/msg01702.html

                  Jack

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-24 20:27 ` David Edelsohn
@ 2003-11-25 11:07   ` Gabriel Paubert
  2003-11-25 17:21     ` David Edelsohn
  0 siblings, 1 reply; 13+ messages in thread
From: Gabriel Paubert @ 2003-11-25 11:07 UTC (permalink / raw)
  To: David Edelsohn; +Cc: Jack Howarth, gcc

On Mon, Nov 24, 2003 at 02:42:54PM -0500, David Edelsohn wrote:
> >>>>> Jack Howarth writes:
> 
> Jack> Does anyone know what the impact is of using -minsert-sched-nops
> Jack> on a non-Power4 processor? That is if I compile some fortran with
> Jack> -minsert-sched-nops on g77 for use on a G5, will the same code work
> Jack> properly on a G4 as well? Thanks in advance for any clarifications.
> 
> 	Yes, the NOPs have no effect on G4 processors.  It's the normal
> PowerPC NOP instruction.
> 
> 	However, targeting G5 may generate some other new instructions.

Which ones, floating point sqrt perhaps ? 

IBM's publically available documentation on the 970 is poor, to put it 
very mildly. I have for example found zero documentation on the MMU
(I know it has no BATs and big page capabilities, but only indirectly 
through mailing lists).

	Gabriel

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-25 11:07   ` Gabriel Paubert
@ 2003-11-25 17:21     ` David Edelsohn
  0 siblings, 0 replies; 13+ messages in thread
From: David Edelsohn @ 2003-11-25 17:21 UTC (permalink / raw)
  To: Gabriel Paubert; +Cc: Jack Howarth, gcc

>>>>> Gabriel Paubert writes:

>> However, targeting G5 may generate some other new instructions.

Gabriel> Which ones, floating point sqrt perhaps ? 

	mfcr single field, for example.

David

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-25 19:42 ` Jack Howarth
@ 2003-11-25 19:58   ` David Edelsohn
  0 siblings, 0 replies; 13+ messages in thread
From: David Edelsohn @ 2003-11-25 19:58 UTC (permalink / raw)
  To: Jack Howarth; +Cc: gcc

>>>>> Jack Howarth writes:

Jack> Yes I always use -mtune=G5 so I assume if I 
Jack> do that when building on a G4 with the additional
Jack> flag of -minsert-sched-nops="regroup_exact" that
Jack> I'll get the proper optimization for LSU rejects
Jack> on a G5.

	Yes.

David

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-25 17:03 Jack Howarth
  2003-11-25 17:51 ` David Edelsohn
@ 2003-11-25 19:42 ` Jack Howarth
  2003-11-25 19:58   ` David Edelsohn
  1 sibling, 1 reply; 13+ messages in thread
From: Jack Howarth @ 2003-11-25 19:42 UTC (permalink / raw)
  To: David Edelsohn; +Cc: gcc

David,
     Yes I always use -mtune=G5 so I assume if I 
do that when building on a G4 with the additional
flag of -minsert-sched-nops="regroup_exact" that
I'll get the proper optimization for LSU rejects
on a G5.
                   Jack

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
  2003-11-25 17:03 Jack Howarth
@ 2003-11-25 17:51 ` David Edelsohn
  2003-11-25 19:42 ` Jack Howarth
  1 sibling, 0 replies; 13+ messages in thread
From: David Edelsohn @ 2003-11-25 17:51 UTC (permalink / raw)
  To: Jack Howarth, Geoff Keating; +Cc: Dorit Naishlos, gcc

>>>>> Jack Howarth writes:

Jack> The question I have is how portable is the code generated if I do
Jack> the following...

Jack> 1) On a G5 (Power4) based machine, compile code with 
Jack> -minsert-sched-nops=scheme (which I assume will result in 
Jack> the default with scheme="regroup_exact" being used). 

Jack> 2) Move the compiled binaries over to a G4 and try to
Jack> run them. Will the use of this scheme in the binary
Jack> cause problems on a G4?

	"Compile on a G5 based machine" is irrelevant.  The information of
importance is whether the compiler is targetting G5.

Jack> I guess I am still a bit confused. If the scheme="regroup_exact"
Jack> doesn't cause problems on a G4 but is useful on a G5, it would
Jack> seem appropriate to allow users to effectively 'cross-compile'
Jack> for the G5 on a G4. That is you ought to be able to do a 
Jack> compile with...

Jack> -minsert-sched-nops="regroup_exact"

Jack> ...on a G4 and move that code over to a G5 and have the
Jack> scheme "regroup_exact" still function. Again the point is
Jack> to be able to access this option for the G5 without resorting
Jack> to the -mcpu=670 flag that would make the code use G5-specific
Jack> instructions and not run on a G4.

	Whether the compiler is targeted for G4 or G5, -minsert-sched-nops
will not cause problems.  The option simply inserts NOPs and a few NOPs
are not harmful to non-G5 processors.  Without targetting G5/970/POWER4,
the feature cannot know where to insert NOPs.

	I infer that you want to compile code with

		-mtune=G5

or maybe

		-mcpu=G4 -mtune=G5

to use G4 features and G5 scheduling so the application runs on both
platforms but is tuned best for G5.

	Contrary to what I was trying to say in earlier messages, the
processor model for NOP insertion is keyed off of "-mtune=".  However, 
use of MFCRF is keyed off of that as well, which is incorrect.  Geoff and
I are going to need to figure out how to test arch for that decision.

David

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
@ 2003-11-25 17:03 Jack Howarth
  2003-11-25 17:51 ` David Edelsohn
  2003-11-25 19:42 ` Jack Howarth
  0 siblings, 2 replies; 13+ messages in thread
From: Jack Howarth @ 2003-11-25 17:03 UTC (permalink / raw)
  To: Dorit Naishlos; +Cc: gcc

Darit,
   The question I have is how portable is the code generated if I do
the following...

1) On a G5 (Power4) based machine, compile code with 
-minsert-sched-nops=scheme (which I assume will result in 
the default with scheme="regroup_exact" being used). 
2) Move the compiled binaries over to a G4 and try to
run them. Will the use of this scheme in the binary
cause problems on a G4?

I guess I am still a bit confused. If the scheme="regroup_exact"
doesn't cause problems on a G4 but is useful on a G5, it would
seem appropriate to allow users to effectively 'cross-compile'
for the G5 on a G4. That is you ought to be able to do a 
compile with...

-minsert-sched-nops="regroup_exact"

...on a G4 and move that code over to a G5 and have the
scheme "regroup_exact" still function. Again the point is
to be able to access this option for the G5 without resorting
to the -mcpu=670 flag that would make the code use G5-specific
instructions and not run on a G4.
                Jack

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: impact of -minsert-sched-nops
@ 2003-11-25 15:13 Dorit Naishlos
  0 siblings, 0 replies; 13+ messages in thread
From: Dorit Naishlos @ 2003-11-25 15:13 UTC (permalink / raw)
  To: Jack Howarth; +Cc: David Edelsohn, gcc





>    Well, as I understood it, the -minsert-sched-nops feature could be
> enabled through either -mcpu=970 or -mcpu=G5 or -mcpu=power4 (which
> would make the code G5 specific) or just through -minsert-sched-nops
> which would limit the change to that optimization leaving the code
> G4 compatible. Or am I missing something here?
>
This is not entirely accurate: -minsert-sched-nops will not have an effect
unless the machine description that the compiler uses is POWER4.
POWER4 is the machine description that describes the G5 machine.
If you want the compiler to use this machine description, you can specify
-mcpu=970 or -mcpu=G5 or -mcpu=power4.

PPC7450 is the machine description that describes the G4 machine.
The option -minsert-sched-nops=scheme does not have an effect when this
machine description is used, since it is not relevant for machine
descriptions other than POWER4.

>    From reading the patch, I thought the default was mode 2 which
> is for the power4?
>
If you specify -mcpu=970/G5/power4, then -minsert-sched-nops=scheme is
enabled by default with scheme="regroup_exact".
You can enable different schemes of this optimizations if you use
-mcpu=970/G5/power4 and -minsert-sched-nops=scheme, with different values
for scheme, as described here:
http://gcc.gnu.org/onlinedocs/gcc/RS-6000-and-PowerPC-Options.html.

dorit

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2003-11-25 17:51 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2003-11-24 20:14 impact of -minsert-sched-nops Jack Howarth
2003-11-24 20:27 ` David Edelsohn
2003-11-25 11:07   ` Gabriel Paubert
2003-11-25 17:21     ` David Edelsohn
2003-11-24 21:52 ` Jack Howarth
2003-11-24 22:03   ` David Edelsohn
2003-11-24 22:49     ` Geoff Keating
2003-11-25  2:23   ` Jack Howarth
2003-11-25 15:13 Dorit Naishlos
2003-11-25 17:03 Jack Howarth
2003-11-25 17:51 ` David Edelsohn
2003-11-25 19:42 ` Jack Howarth
2003-11-25 19:58   ` David Edelsohn

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