From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7201 invoked by alias); 20 Jan 2004 19:05:40 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 7172 invoked from network); 20 Jan 2004 19:05:36 -0000 Received: from unknown (HELO smtp.uk.superh.com) (193.128.105.170) by sources.redhat.com with SMTP; 20 Jan 2004 19:05:36 -0000 Received: from sh-uk-ex01.uk.w2k.superh.com (sh-uk-ex01 [192.168.16.17]) by smtp.uk.superh.com (8.12.10/8.12.10) with ESMTP id i0KJ56lh028410; Tue, 20 Jan 2004 19:05:08 GMT Received: from linsvr1.uk.superh.com ([192.168.16.50]) by sh-uk-ex01.uk.w2k.superh.com with Microsoft SMTPSVC(5.0.2195.6713); Tue, 20 Jan 2004 19:06:29 +0000 Received: (from renneckej@localhost) by linsvr1.uk.superh.com (8.11.6/8.11.6) id i0KJ54i02295; Tue, 20 Jan 2004 19:05:04 GMT From: Joern Rennecke Message-Id: <200401201905.i0KJ54i02295@linsvr1.uk.superh.com> Subject: Re: Floating point registers vs. LOAD_EXTEND_OP on alpha To: rth@redhat.com (Richard Henderson) Date: Tue, 20 Jan 2004 19:05:00 -0000 Cc: rsandifo@redhat.com (Richard Sandiford), joern.rennecke@superh.com (Joern Rennecke), roger@eyesopen.com (Roger Sayle), gcc@gcc.gnu.org, gcc-patches@gcc.gnu.org In-Reply-To: <20040120171715.GA7564@redhat.com> from "Richard Henderson" at Jan 20, 2004 09:17:15 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 20 Jan 2004 19:06:29.0530 (UTC) FILETIME=[828C87A0:01C3DF88] X-Scanned-By: MIMEDefang 2.39 X-SW-Source: 2004-01/txt/msg01539.txt.bz2 > > On the other hand, what's the point of having CANNOT_CHANGE_MODE_CLASS > > if post-reload passes are allowed to change the mode of a register like > > this? Unextended registers aren't the only thing that could go wrong on > > MIPS if you ignore the macro. E.g. the HI/LO registers are always > > ordered that way round, even on little-endian systems. I know it > > should be changed, but ISTR other ports have similar warts... > > You make a good case. Also, the fact that it's more than just > Alpha and PA makes me wonder what other port will have issues. > > Joern, why don't you go ahead and work something up? I've found that the other hunk in postreload was already guarded with a test of CLASS_CANNOT_CHANGE_MODE, but without reflecting the potential or dangers of this check in the documentation. N.B. without the documentation change, it is allowed that a port says some QImode register can be extended to HImode, but can't be extended to SImode, which is word_mode, while makeing LOAD_EXTEND_OP SIGN_EXTEND. Then combine might make use of an implicit QI->HI sign extension, while psotreload decides that the extension doesn't exist, because it doesn't extend to word_mode. I don't have any access to mips or alpha machines, so could someone else test this? 2004-01-20 J"orn Rennecke * doc/tm.texi: Insert some weasel words when LOAD_EXTEND_OP may or may not return non-NIL. * postreload.c (): Index: doc/tm.texi =================================================================== RCS file: /cvs/gcc/gcc/gcc/doc/tm.texi,v retrieving revision 1.284 diff -p -r1.284 tm.texi *** doc/tm.texi 18 Jan 2004 11:57:16 -0000 1.284 --- doc/tm.texi 20 Jan 2004 18:52:05 -0000 *************** smaller than a word are always performed *** 8498,8517 **** Most RISC machines have this property and most CISC machines do not. @end defmac ! @defmac LOAD_EXTEND_OP (@var{mode}) Define this macro to be a C expression indicating when insns that read ! memory in @var{mode}, an integral mode narrower than a word, set the ! bits outside of @var{mode} to be either the sign-extension or the zero-extension of the data read. Return @code{SIGN_EXTEND} for values ! of @var{mode} for which the insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and @code{NIL} for other modes. ! This macro is not called with @var{mode} non-integral or with a width greater than or equal to @code{BITS_PER_WORD}, so you may return any value in this case. Do not define this macro if it would always return @code{NIL}. On machines where this macro is defined, you will normally define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}. @end defmac @defmac SHORT_IMMEDIATES_SIGN_EXTEND --- 8498,8528 ---- Most RISC machines have this property and most CISC machines do not. @end defmac ! @defmac LOAD_EXTEND_OP (@var{mem_mode}) Define this macro to be a C expression indicating when insns that read ! memory in @var{mem_mode}, an integral mode narrower than a word, set the ! bits outside of @var{mem_mode} to be either the sign-extension or the zero-extension of the data read. Return @code{SIGN_EXTEND} for values ! of @var{mem_mode} for which the insn sign-extends, @code{ZERO_EXTEND} for which it zero-extends, and @code{NIL} for other modes. ! This macro is not called with @var{mem_mode} non-integral or with a width greater than or equal to @code{BITS_PER_WORD}, so you may return any value in this case. Do not define this macro if it would always return @code{NIL}. On machines where this macro is defined, you will normally define it as the constant @code{SIGN_EXTEND} or @code{ZERO_EXTEND}. + + You may return a non-@code{NIL} value even if for some hard registers + the sign extension is not performed, if for the @code{REGNO_REG_CLASS} + of these hard registers @code{CANNOT_CHANGE_MODE_CLASS} returns nonzero + when the @var{from} mode is @var{mem_mode} and the @var{to} mode is any + integral mode larger than this but not larger than @code{word_mode}. + + You must return @code{NIL} if form some hard registers that allow this + mode, @code{CANNOT_CHANGE_MODE_CLASS} says that they cannot change to + @code{word_mode}, but that they can change to another integral mode that + is larger then @var{mem_mode} but still smaller than @code{word_mode}. @end defmac @defmac SHORT_IMMEDIATES_SIGN_EXTEND Index: postreload.c =================================================================== RCS file: /cvs/gcc/gcc/gcc/postreload.c,v retrieving revision 2.9 diff -p -r2.9 postreload.c *** postreload.c 16 Jan 2004 16:11:56 -0000 2.9 --- postreload.c 20 Jan 2004 18:52:05 -0000 *************** reload_cse_simplify_operands (rtx insn, *** 423,428 **** --- 423,437 ---- || GET_CODE (SET_SRC (set)) == ZERO_EXTEND || GET_CODE (SET_SRC (set)) == SIGN_EXTEND) ; /* Continue ordinary processing. */ + #ifdef CANNOT_CHANGE_MODE_CLASS + /* If the register cannot change mode to word_mode, it follows that + it cannot have been used in word_mode. */ + else if (GET_CODE (SET_DEST (set)) == REG + && CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)), + word_mode, + REGNO_REG_CLASS (REGNO (SET_DEST (set))))) + ; /* Continue ordinary processing. */ + #endif /* If this is a straight load, make the extension explicit. */ else if (GET_CODE (SET_DEST (set)) == REG && recog_data.n_operands == 2