From: David Edelsohn <dje@watson.ibm.com>
To: Dorit Naishlos <DORIT@il.ibm.com>
Cc: gcc@gcc.gnu.org
Subject: Re: rs6000.md/altivec.md problem in setting of vector registers
Date: Tue, 23 Mar 2004 22:10:00 -0000 [thread overview]
Message-ID: <200403202218.i2KMIGT27996@makai.watson.ibm.com> (raw)
In-Reply-To: Message from Dorit Naishlos <DORIT@il.ibm.com> of "Sun, 21 Mar 2004 00:09:52 +0200." <OF0332C25D.94FB0ACD-ONC2256E5D.007800B1-C2256E5D.0079C0B9@il.ibm.com>
>>>>> Dorit Naishlos writes:
Dorit> I focused on understanding what in the machine description explains the
Dorit> different ways Reload handles the same pattern ('set subreg') on the two
Dorit> platforms (i386/powerpc).
Altivec and SSE are integrated in their respective architectures
in different ways, so GCC of one is not alway appropriate for the other.
The vec_set and vec_extract patterns provide explicit control over setting
vector elements, so that probably is the best way to achieve the optimal
behavior.
David
next prev parent reply other threads:[~2004-03-23 20:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <OF6E029669.0E5E3F05-ONC2256E5C.000482C4-C2256E5C.0004D314@il.ibm.com>
2004-03-19 8:45 ` David Edelsohn
2004-03-21 0:36 ` Dorit Naishlos
2004-03-23 22:10 ` David Edelsohn [this message]
2004-03-23 17:03 ` Dorit Naishlos
2004-03-19 20:59 ` Dale Johannesen
2004-03-21 1:47 ` Dorit Naishlos
2004-03-03 16:46 Dorit Naishlos
2004-03-03 17:52 ` David Edelsohn
2004-03-03 18:16 ` Dorit Naishlos
2004-03-03 18:44 ` Dale Johannesen
2004-03-05 0:06 ` Dorit Naishlos
2004-03-05 0:23 ` Dale Johannesen
2004-03-09 18:46 ` David Edelsohn
2004-03-11 22:38 ` David Edelsohn
2004-03-11 23:31 ` Richard Henderson
2004-03-12 3:14 ` David Edelsohn
2004-03-07 18:30 ` Aldy Hernandez
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