From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1769 invoked by alias); 11 Sep 2004 00:18:05 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 1750 invoked from network); 11 Sep 2004 00:18:03 -0000 Received: from unknown (HELO atrey.karlin.mff.cuni.cz) (195.113.31.123) by sourceware.org with SMTP; 11 Sep 2004 00:18:03 -0000 Received: by atrey.karlin.mff.cuni.cz (Postfix, from userid 4018) id 918E64B4397; Sat, 11 Sep 2004 02:18:02 +0200 (CEST) Date: Sat, 11 Sep 2004 01:58:00 -0000 From: Jan Hubicka To: James E Wilson Cc: "H. J. Lu" , gcc@gcc.gnu.org Subject: Re: Redundant instructions in loop optimization for x86-64? Message-ID: <20040911001802.GH378@atrey.karlin.mff.cuni.cz> References: <20040910000026.GA25099@lucon.org> <20040910095023.GF378@atrey.karlin.mff.cuni.cz> <20040910165450.GA8456@lucon.org> <414211DD.5030900@specifixinc.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <414211DD.5030900@specifixinc.com> User-Agent: Mutt/1.5.6i X-SW-Source: 2004-09/txt/msg00649.txt.bz2 > H. J. Lu wrote: > >Is there a way to tell gcc that 32bit zero extension isn't needed for > >x86-64? > > It isn't quite that simple. Sometimes they will be needed. Sometimes > they won't. > > You might want to look at > http://gcc.gnu.org/ml/gcc/2004-09/msg00377.html > which is a proposal to add an RTL optimization pass to eliminate > unnecessary sign/zero extension instructions on targets that support > both 32-bit and 64-bit code. Actually I think Zdenek's ivopts should care this case by promoting the induction variable to 64bit. I already assigned the bugreport to him, so lets see what happens son ;) Without the actual promote, the zero extend is really needed and it is almost impossible to elliminate it on RTL level since you need to watch overflows. Honza > -- > Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com