Different classes for base registers

Different classes for base registers

[Tal Agmon]

Hi,

I'm working on a new target port in which there are different base
registers 
allowed depending on the offset:
r0-r7 are allowed as base register only when the offset is zero.
r6-r7 are allowed as base register for every offset.

I'm wondering if gcc is prepared for such scenario, examine the code in 
find_reloads_address(), for the architecture I'm working on, it seems
the 
condition here should be true, because it might not be valid because the
base reg isn't r6-r7, not only because the disp is too large.
Yet it fails because of REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode).


  /* If we have address of a stack slot but it's not valid because the
     displacement is too large, compute the sum in a register.
     Handle all base registers here, not just fp/ap/sp, because on some
     targets (namely SH) we can also get too large displacements from
     big-endian corrections.  */
  else if (GET_CODE (ad) == PLUS
         && REG_P (XEXP (ad, 0))
         && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
         && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
         && GET_CODE (XEXP (ad, 1)) == CONST_INT)
    {
      /* Unshare the MEM rtx so we can safely alter it.  */
      if (memrefloc)
      {
        *memrefloc = copy_rtx (*memrefloc);
        loc = &XEXP (*memrefloc, 0);

        if (removed_and)
          loc = &XEXP (*loc, 0);
      }
...
 
Is there any way to get along by defining r0-r7 as legal base regs and
deal 
with r6-r7 in GO_IF_LEGITIMATE_ADDRESS and in the constraint
definitions, 
or am I right with my assumption that gcc doesn't support that?

Does someone knows if there's a target with a similar behavior?

Thanks in advance,

Tal Agmon.

Re: Different classes for base registers

[Rask Ingemann Lambertsen]

On Tue, May 29, 2007 at 03:56:38PM +0300, Tal Agmon wrote:
> Hi,
> 
> I'm working on a new target port in which there are different base
> registers 
> allowed depending on the offset:
> r0-r7 are allowed as base register only when the offset is zero.
> r6-r7 are allowed as base register for every offset.

   I think a new macro along the lines of MODE_CODE_BASE_REG_CLASS might do
the trick.

   Perhaps this family of macros needs to be cleaned up, so you have:

RTX_BASE_REG_CLASS(x)
RTX_INDEX_REG_CLASS(x)

where x is the address expression as an RTX.

-- 
Rask Ingemann Lambertsen