From: Paul Brook <paul@codesourcery.com>
To: gcc@gcc.gnu.org
Cc: Boris Boesler <baembel@gmx.de>, Ian Lance Taylor <iant@google.com>
Subject: Re: Allocating scratch register
Date: Thu, 10 Jan 2008 16:47:00 -0000 [thread overview]
Message-ID: <200801101646.49703.paul@codesourcery.com> (raw)
In-Reply-To: <97A81DD8-6B29-4F32-89D6-08B185E9E888@gmx.de>
> Yes, I can remember that constraints in a mov-insn can not be
> resolved by other/additional mov-insns.
I think you're doing this the wrong way. You don't have a i->m mov
instruction, so why are you pretending you do?
Why aren't you doing this the same way as pretty much every other target?
i.e.:
(define_insn "*movqi_insn"
[(set (match_operand:QI 0 "reg_mem_operand" "=r,m")
(match_operand:QI 1 "rim_operand" " mi,r"))
""
"mov %0,%1"
)
(define_expand "movqi"
[(set (match...) (match...)]
""
"
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
"
)
Plus the appropriate *_RELOAD_CLASS macros to keep reload happy.
Paul
prev parent reply other threads:[~2008-01-10 16:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-01-09 18:26 Boris Boesler
2008-01-09 22:55 ` Ian Lance Taylor
2008-01-10 16:22 ` Boris Boesler
2008-01-10 16:47 ` Paul Brook [this message]
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