From: Vidya Praveen <vidyapraveen@arm.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: Richard Biener <rguenther@suse.de>,
"gcc@gcc.gnu.org" <gcc@gcc.gnu.org>, "ook@ucw.cz" <ook@ucw.cz>,
"marc.glisse@inria.fr" <marc.glisse@inria.fr>
Subject: Re: [RFC] Vectorization of indexed elements
Date: Wed, 04 Dec 2013 17:07:00 -0000 [thread overview]
Message-ID: <20131204170721.GC26784@e103625-lin.cambridge.arm.com> (raw)
In-Reply-To: <20131011150524.GX30970@tucnak.zalov.cz>
Hi Jakub,
Apologies for the late response.
On Fri, Oct 11, 2013 at 04:05:24PM +0100, Jakub Jelinek wrote:
> On Fri, Oct 11, 2013 at 03:54:08PM +0100, Vidya Praveen wrote:
> > Here's a compilable example:
> >
> > void
> > foo (int *__restrict__ a,
> > int *__restrict__ b,
> > int *__restrict__ c)
> > {
> > int i;
> >
> > for (i = 0; i < 8; i++)
> > a[i] = b[i] * c[2];
> > }
> >
> > This is vectorized by duplicating c[2] now. But I'm trying to take advantage
> > of target instructions that can take a vector register as second argument but
> > use only one element (by using the same value for all the lanes) of the
> > vector register.
> >
> > Eg. mul <vec-reg>, <vec-reg>, <vec-reg>[index]
> > mla <vec-reg>, <vec-reg>, <vec-reg>[index] // multiply and add
> >
> > But for a loop like the one in the C example given, I will have to load the
> > c[2] in one element of the vector register (leaving the remaining unused)
> > rather. This is why I was proposing to load just one element in a vector
> > register (what I meant as "lane specific load"). The benefit of doing this is
> > that we avoid explicit duplication, however such a simplification can only
> > be done where such support is available - the reason why I was thinking in
> > terms of optional standard pattern name. Another benefit is we will also be
> > able to support scalars in the expression like in the following example:
> >
> > void
> > foo (int *__restrict__ a,
> > int *__restrict__ b,
> > int c)
> > {
> > int i;
> >
> > for (i = 0; i < 8; i++)
> > a[i] = b[i] * c;
> > }
>
> So just during combine let the broadcast operation be combined with the
> arithmetics?
Yes. I can do that. But I always want it to be possible to recognize and load
directly to the indexed vector register from memory.
> Intel AVX512 ISA has similar feature, not sure what exactly
> they are doing for this.
Thanks. I'll try to go through the code to understand.
> That said, the broadcast is likely going to be
> hoisted before the loop, and in that case is it really cheaper to have
> it unbroadcasted in a vector register rather than to broadcast it before the
> loop and just use there?
Could you explain what do you mean by unbroadcast? The constructor needs to be
expanded in one way or another, isn't it? I thought expanding to vec_duplicate
when the values are uniform is the most efficient when vec_duplicate could be
supported by the target. If you had meant that each element of vector is loaded
separately, I am thinking how can I combine such an operation with the arithmetic
operation.
Thanks
VP.
next prev parent reply other threads:[~2013-12-04 17:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-09 17:25 Vidya Praveen
2013-09-09 18:02 ` Marc Glisse
2013-09-10 8:25 ` Richard Biener
2013-09-24 15:03 ` Vidya Praveen
2013-09-25 9:22 ` Richard Biener
2013-09-30 13:01 ` Vidya Praveen
2013-09-24 15:04 ` Vidya Praveen
2013-09-25 9:25 ` Richard Biener
2013-09-27 14:50 ` Vidya Praveen
2013-09-27 15:19 ` Vidya Praveen
2013-09-30 12:55 ` Vidya Praveen
2013-09-30 13:19 ` Richard Biener
2013-09-30 14:00 ` Vidya Praveen
2013-10-01 8:26 ` Richard Biener
2013-10-11 14:54 ` Vidya Praveen
2013-10-11 15:05 ` Jakub Jelinek
2013-12-04 17:07 ` Vidya Praveen [this message]
2013-10-14 8:05 ` Richard Biener
2013-12-04 16:10 ` Vidya Praveen
2013-12-06 11:48 ` Richard Biener
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