From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 110290 invoked by alias); 5 Jul 2018 16:01:58 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 110272 invoked by uid 89); 5 Jul 2018 16:01:57 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=2.1 required=5.0 tests=AWL,BAYES_50,RCVD_IN_DNSWL_NONE,UNSUBSCRIBE_BODY autolearn=no version=3.3.2 spammy=Channel, sk:slow_by, Pointer, 5,10 X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 05 Jul 2018 16:01:56 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w65G1clN010215; Thu, 5 Jul 2018 11:01:39 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id w65G1crd010213; Thu, 5 Jul 2018 11:01:38 -0500 Date: Thu, 05 Jul 2018 16:01:00 -0000 From: Segher Boessenkool To: Paul Koning Cc: GCC Development Subject: Re: Inefficient code Message-ID: <20180705160137.GM16221@gate.crashing.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2018-07/txt/msg00085.txt.bz2 On Thu, Jul 05, 2018 at 08:45:30AM -0400, Paul Koning wrote: > I have a struct that looks like this: > > struct Xrb > { > uint16_t xrlen; /* Length of I/O buffer in bytes */ > uint16_t xrbc; /* Byte count for transfer */ > void * xrloc; /* Pointer to I/O buffer */ > uint8_t xrci; /* Channel number times 2 for transfer */ > uint32_t xrblk:24; /* Random access block number */ > uint16_t xrtime; /* Wait time for terminal input */ > uint16_t xrmod; /* Modifiers */ > }; > > When I write to xrblk (that 24 bit field) on my 16 bit target, I get unexpectly inefficient output: > > XRB->xrblk = 5; > > movb #5,10(r0) > clrb 11(r0) > clrb 7(r0) (7? not 12?) > rather than the expected word write to the word-aligned lower half of that field. > > Looking at the dumps, I see it coming into the RTL expand phase as a single write, which expand then turns into the three insns corresponding to the above. But (of course) there is a word (HImode) move also, which has the same cost as the byte one. > > Is there something I have to do in my target definition to get this to come out right? This is a strict_alignment target, but alignment is satisfied in this example. Also, SLOW_BYTE_ACCESS is 1. What is your MOVE_MAX? It should be 2 probably. Segher