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From: Segher Boessenkool <segher@kernel.crashing.org>
To: "Алексей Хилаев" <hardest2005@mail.ru>
Cc: gcc@gcc.gnu.org
Subject: Re: Please help!!!
Date: Mon, 06 May 2019 15:30:00 -0000	[thread overview]
Message-ID: <20190506153014.GB8599@gate.crashing.org> (raw)
In-Reply-To: <1557147718.189664150@f513.i.mail.ru>

On Mon, May 06, 2019 at 04:01:58PM +0300, Алек�1557147755�й Хилаев via gcc wrote:
> Gcc riscv won`t emit my insns, binutils and spike(riscv sim) work correctly, but gcc don`t. I want to add min/max for integer, gcc compiling correct, sim executing correctly.
> 
> (define_insn "*min_<X:mode><GPR:mode>"
> [(set (match_operand:GPR 0 "register_operand" "=r")
> (smin:GPR (match_operand:X 1 "register_operand" " r")
> (match_operand:X 2 "register_operand" " r")))]
> ""
> "min\t%0,%1,%2"
> [(set_attr "type" "move")
> (set_attr "mode" "<X:MODE>")])

You need to call the patterns "minsi3" and the like, if you want it to be
automatically generated.  Possibly combine can also make these patterns
for you; look at its dump file (-fdump-rtl-combine-all) to see what it
tried.


Segher

  reply	other threads:[~2019-05-06 15:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-06 13:02 Алексей Хилаев via gcc
2019-05-06 15:30 ` Segher Boessenkool [this message]
2019-05-06 18:12 ` Jim Wilson
     [not found] <BAY101-F25251F0DA33E9BCA0D67E7A1CC0@phx.gbl>
2005-07-28  2:59 ` PLEASE HELP!! Chris Garrett
  -- strict thread matches above, loose matches on Subject: below --
2005-06-03  6:34 Please help Prafulla Shukla
2005-06-03  6:42 ` Karel Gardas
2005-06-03  7:04   ` Prafulla Shukla
2005-05-03 13:58 PLEASE HELP! R Lokesh babu
2005-05-03 14:19 ` Ian Lance Taylor
2005-05-04  5:57 ` R Lokesh babu
2001-03-13  1:40 PLease help ! Sharon_Zehavi
2001-03-13  3:51 ` Erik Mouw
2001-03-13  6:33 ` Alexandre Oliva

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