From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 86367 invoked by alias); 8 Aug 2019 19:09:43 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 86358 invoked by uid 89); 8 Aug 2019 19:09:43 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 spammy=HX-Languages-Length:809, H*f:sk:CE15867, H*i:sk:CE15867, H*Ad:U*john X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 08 Aug 2019 19:09:41 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id x78J9Sfe019301; Thu, 8 Aug 2019 14:09:28 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id x78J9RQO019300; Thu, 8 Aug 2019 14:09:27 -0500 Date: Thu, 08 Aug 2019 19:09:00 -0000 From: Segher Boessenkool To: Paul Koning Cc: Vladimir Makarov , John Darrington , gcc@gcc.gnu.org Subject: Re: Indirect memory addresses vs. lra Message-ID: <20190808190927.GJ31406@gate.crashing.org> References: <20190804191822.x4hwnfcyplnto3xc@jocasta.intra> <2B3A4EAB-D69E-4714-8FC4-C25E36B07BFF@comcast.net> <20190808172102.GH31406@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2019-08/txt/msg00056.txt.bz2 On Thu, Aug 08, 2019 at 01:25:27PM -0400, Paul Koning wrote: > > On Aug 8, 2019, at 1:21 PM, Segher Boessenkool wrote: > > On Thu, Aug 08, 2019 at 12:43:52PM -0400, Paul Koning wrote: > >> Indirect addressing is a key feature in size-optimized code. > > > > That doesn't mean that LRA has to support it, btw, not necessarily; it > > may well be possible to do a good job of this in the later passes? > > Maybe postreload, maybe some peepholes, etc.? > > Possibly. But as Vladimir points out, indirect addressing affects > register allocation (reducing register pressure). Yeah, good point, esp. if you have only one or two registers that you can use for addressing at all. So it will have to happen during (or before?) RA, alright. Segher