From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 65342 invoked by alias); 10 Aug 2019 16:46:11 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 65271 invoked by uid 89); 10 Aug 2019 16:46:07 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 spammy=rounds X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 10 Aug 2019 16:46:06 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id x7AGk2b5001121; Sat, 10 Aug 2019 11:46:02 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id x7AGk0SY001120; Sat, 10 Aug 2019 11:46:00 -0500 Date: Sat, 10 Aug 2019 16:46:00 -0000 From: Segher Boessenkool To: Tejas Joshi Cc: gcc@gcc.gnu.org, Martin Jambor , hubicka@ucw.cz, joseph@codesourcery.com Subject: Re: Expansion of narrowing math built-ins into power instructions Message-ID: <20190810164600.GT31406@gate.crashing.org> References: <87sgqnx4i6.fsf@oldenburg2.str.redhat.com> <20190731144722.GS31406@gate.crashing.org> <20190808200514.GL31406@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2019-08/txt/msg00081.txt.bz2 Hi! On Sat, Aug 10, 2019 at 04:00:53PM +0530, Tejas Joshi wrote: > I have been trying to write a basic pattern taking all the suggestions > you both have mentioned. The same patch is attached here, but I cannot > see call to : > > float > foo (double x, double y) > { > return __builtin_fadd (x, y); > } > being expanded to any instruction, at least a simple one, using > -fno-builtin-fadd (and also -mhard-float?). It always stays "bl fadd". > What am I missing here? As far as I understand that flag should set the behaviour of the fadd function, not the __builtin_fadd one. So I don't know. > > (POWER8 and later) on. (The result if OE=1 or UE=1 is undefined). (See > > 4.3.5.1 in the ISA). > > 4.3.5.1 in the ISA says that single precision arithmetic instructions > perform operation in double format and coerces the result in single > format. Can fadd be considered as this type of instruction or do I > need to perform add in DFmode and then use "instruction provided to > explicitly convert double format operand in FPR to single format."? A single precision add is "fadds". It rounds its result to single precision. I'm lost what the exact semantic of the wanted fadd() function are. I thought you wanted to add two single precision numbers, producing a double precision one. But instead you want to add two double precision numbers, producing a single precision one? The fadds instruction fits well to that, but you'll have to check exactly how the fadd() function should behave with respect to rounding and exceptions and the like. Segher