From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12054 invoked by alias); 14 Aug 2019 07:21:35 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 11780 invoked by uid 89); 14 Aug 2019 07:21:35 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 spammy=fadds, d,wa, fwa, f,wa X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 14 Aug 2019 07:21:34 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id x7E7LTQw032243; Wed, 14 Aug 2019 02:21:29 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id x7E7LS0W032240; Wed, 14 Aug 2019 02:21:28 -0500 Date: Wed, 14 Aug 2019 07:21:00 -0000 From: Segher Boessenkool To: Tejas Joshi Cc: gcc@gcc.gnu.org, Martin Jambor , hubicka@ucw.cz, joseph@codesourcery.com Subject: Re: Expansion of narrowing math built-ins into power instructions Message-ID: <20190814072127.GE31406@gate.crashing.org> References: <20190808200514.GL31406@gate.crashing.org> <20190811165916.GX31406@gate.crashing.org> <20190812175450.GB31406@gate.crashing.org> <20190812215224.GC31406@gate.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2019-08/txt/msg00100.txt.bz2 On Wed, Aug 14, 2019 at 11:51:28AM +0530, Tejas Joshi wrote: > > The RTL needs to be something that > > does *not* match the combination of separate operations (just as fma has > > its own RTL, and a separate pass is responsible for converting separate > > So do I need to introduce fadd's own RTL just as fma which would emit > a fused instruction while -ffp-contract is default (fast) and would > emit separate instructions like add in DFmode and then truncate to SF? > while -ffp-contract=off ? (just as fma) I think you can do one RTL code that replaces float_truncate in > > > > (define_insn "add_truncdfsf3" > > > > [(set (match_operand:SF 0 "gpc_reg_operand" "=f,wa") > > > > (float_truncate:SF > > > > (plus:DF (match_operand:DF 1 "gpc_reg_operand" "%d,wa") > > > > (match_operand:DF 2 "gpc_reg_operand" "d,wa"))))] but that is only meant for such explicit contraction. This can then happily be used to implement all such patterns. Is there some issue with that I overlook? A good name for this... I would say "float_contract", because I like horrible names. It shouldn't be hard to think of something better :-) Segher