From: Jakub Jelinek <jakub@redhat.com>
To: Richard Biener <richard.guenther@gmail.com>
Cc: "Liu, Hongtao" <hongtao.liu@intel.com>,
Thomas Schwinge <thomas@codesourcery.com>,
"gcc@gcc.gnu.org" <gcc@gcc.gnu.org>,
Tobias Burnus <tobias@codesourcery.com>
Subject: Re: GCC/OpenMP offloading for Intel GPUs?
Date: Wed, 15 Sep 2021 11:25:31 +0200 [thread overview]
Message-ID: <20210915092531.GB304296@tucnak> (raw)
In-Reply-To: <CAFiYyc3A-Vutrp1EaQQ++xW994TZBieBDSvs7w1MpGmVMZtF5A@mail.gmail.com>
On Wed, Sep 15, 2021 at 11:19:29AM +0200, Richard Biener wrote:
> On Wed, Sep 15, 2021 at 4:02 AM Liu, Hongtao via Gcc <gcc@gcc.gnu.org> wrote:
> >
> > I got some feedback from my colleague
> >
> > -----------------
> > What we need from GCC
> >
> > 1. generate SPIR-V
>
> But is SPIR-V powerful enough here, if wikipedia is right and it is
> close to GLSL
> then it likely has not the ability to perform calls? You'd need sth
> like HSAIL then.
I believe SPIR-V is essentially LLVM IR, except with some restrictions and
perhaps small additions.
> > 2. offload bundler to create FAT object
We already produce FAT objects our way.
> > --------------
> >
> > If the answer is yes for both, they can hook it up with libomptarget library and our IGC back-end.
We really can't use libomptarget, it clashes with what libgomp provides
which is handling both the host OpenMP threads and OpenMP/OpenACC
offloading. Is the IGC back-end open source? Does it use LLVM to compile
SPIR-V into whatever ISA the Intel GPGPUs have?
Jakub
next prev parent reply other threads:[~2021-09-15 9:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 16:57 Thomas Schwinge
2021-09-15 2:00 ` Liu, Hongtao
2021-09-15 9:19 ` Richard Biener
2021-09-15 9:25 ` Jakub Jelinek [this message]
2021-09-15 11:19 ` Thomas Schwinge
2021-09-16 1:40 ` Liu, Hongtao
2021-09-21 10:31 ` Thomas Schwinge
2021-09-21 14:10 ` Tian, Xinmin
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