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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Andrew Stubbs <ams@codesourcery.com>
Cc: gcc mailing list <gcc@gcc.gnu.org>
Subject: Re: Register allocation cost question
Date: Tue, 10 Oct 2023 14:09:30 -0500	[thread overview]
Message-ID: <20231010190930.GV19790@gate.crashing.org> (raw)
In-Reply-To: <9c350ebd-fd67-4975-abee-68787f97c383@codesourcery.com>

Hi Andrew,

On Tue, Oct 10, 2023 at 04:11:18PM +0100, Andrew Stubbs wrote:
> I'm also seeing wrong-code bugs when I allow more than 32 new registers, 
> but that might be an unrelated problem. Or the allocation is broken? I'm 
> still analyzing this.

It could be connected.  both things should not happen.

> If it matters, ... the new registers can't be used for general purposes, 

What does this mean?  I think you mean they *can* be used for anything,
you just don't want to (maybe it is slow)?  If you make it allocatable
registers, they *will* be allocated for anythin the compilers deems a
good idea.

> so I'm trying to set them up as a temporary spill destination. This 
> means they're typically not busy. It feels like it shouldn't be this 
> hard... :(

So what did you do, put them later in the allocation order?  Make their
register_move_cost higher than for normal registers (but still below
memory_move_cost)?  Or what?  TARGEt_SPILL_CLASS maybe?


Segher

  reply	other threads:[~2023-10-10 19:10 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-10 15:11 Andrew Stubbs
2023-10-10 19:09 ` Segher Boessenkool [this message]
2023-10-11  8:57   ` Andrew Stubbs
2023-10-11 14:49   ` Andrew Stubbs
2023-10-11  6:54 ` Chung-Lin Tang
2023-10-11  8:58   ` Andrew Stubbs
2023-10-11 10:56     ` Richard Earnshaw (lists)

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