From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by sourceware.org (Postfix) with ESMTP id 9DE473858CDB for ; Tue, 10 Oct 2023 19:10:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9DE473858CDB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.crashing.org Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 39AJ9U9l002564; Tue, 10 Oct 2023 14:09:30 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 39AJ9UiO002563; Tue, 10 Oct 2023 14:09:30 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Tue, 10 Oct 2023 14:09:30 -0500 From: Segher Boessenkool To: Andrew Stubbs Cc: gcc mailing list Subject: Re: Register allocation cost question Message-ID: <20231010190930.GV19790@gate.crashing.org> References: <9c350ebd-fd67-4975-abee-68787f97c383@codesourcery.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9c350ebd-fd67-4975-abee-68787f97c383@codesourcery.com> User-Agent: Mutt/1.4.2.3i X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,JMQ_SPF_NEUTRAL,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Andrew, On Tue, Oct 10, 2023 at 04:11:18PM +0100, Andrew Stubbs wrote: > I'm also seeing wrong-code bugs when I allow more than 32 new registers, > but that might be an unrelated problem. Or the allocation is broken? I'm > still analyzing this. It could be connected. both things should not happen. > If it matters, ... the new registers can't be used for general purposes, What does this mean? I think you mean they *can* be used for anything, you just don't want to (maybe it is slow)? If you make it allocatable registers, they *will* be allocated for anythin the compilers deems a good idea. > so I'm trying to set them up as a temporary spill destination. This > means they're typically not busy. It feels like it shouldn't be this > hard... :( So what did you do, put them later in the allocation order? Make their register_move_cost higher than for normal registers (but still below memory_move_cost)? Or what? TARGEt_SPILL_CLASS maybe? Segher