From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15778 invoked by alias); 3 May 2010 20:11:42 -0000 Received: (qmail 15408 invoked by uid 22791); 3 May 2010 20:11:33 -0000 X-SWARE-Spam-Status: No, hits=-1.0 required=5.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED,FREEMAIL_FROM,NML_ADSP_CUSTOM_MED,SPF_HELO_PASS,T_RP_MATCHES_RCVD,T_TO_NO_BRKTS_FREEMAIL X-Spam-Check-By: sourceware.org Received: from kuber.nabble.com (HELO kuber.nabble.com) (216.139.236.158) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 03 May 2010 20:11:29 +0000 Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1O91zC-0000FJ-7J for gcc@gcc.gnu.org; Mon, 03 May 2010 13:11:26 -0700 Message-ID: <28439702.post@talk.nabble.com> Date: Mon, 03 May 2010 20:11:00 -0000 From: yazdanbakhsh To: gcc@gcc.gnu.org Subject: Re: Question about Machine Description In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit References: <63281.24.163.112.200.1128386718.squirrel@webmail.ncsu.edu> <28433505.post@talk.nabble.com> X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2010-05/txt/msg00047.txt.bz2 Hi, Please assume I'm working with the MIPS. There is a little difference between the MIPS and what I'm actually working on it. How can I remove immediate logical shift right/left from the compiler? I mean If I want the programmer writes an immediate shift, It is compiled to the two instructions: sll %2,%2,5 changed to: addi %3,%0,5 sllv %2,%2,%3 thanks in advance Ian Lance Taylor-3 wrote: > > yazdanbakhsh writes: > >> I'm working on my a gcc compiler for my own written processor with the >> help >> of SimpleScalar. >> I want to remove "srav/slav" (immediate arithmetic shift) from the >> instruction set. I explore ss.md file but I didn't see any define_ins for >> the mentioned instructions, but they are used in other instruction >> definitions. >> It is also exist for addi/addui. Where I can find the definitions of >> these >> instructions? I want to force gcc to just use register shift and register >> add. > > There is no ss.md file in the standard gcc distribution. If > SimpleScalar has a gcc port, I don't know anything about it. So it's > hard to answer to your question precisely. > > Instructions can come from either a .md file or a .c file in the > config/CPU directory used for your CPU. If those instructions are > appearing in the generated assembler, then they must be in there > somewhere. > > Ian > > -- View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p28439702.html Sent from the gcc - Dev mailing list archive at Nabble.com.