From: yazdanbakhsh <amir.yazdanbakhsh@gmail.com>
To: gcc@gcc.gnu.org
Subject: Re: Question about Machine Description
Date: Tue, 04 May 2010 16:05:00 -0000 [thread overview]
Message-ID: <28449607.post@talk.nabble.com> (raw)
In-Reply-To: <mcrpr1bg144.fsf@dhcp-172-17-9-151.mtv.corp.google.com>
I have read all the documents, and changed some lines but nothing happened :(
Ian Lance Taylor-3 wrote:
>
> yazdanbakhsh <amir.yazdanbakhsh@gmail.com> writes:
>
>> I want to change instruction blez to ble. ble compare two registers and
>> jump
>> to the target address if the condition is true.
>
> Read the internals manual to understand how operand predicates and
> constraints work. See the hundreds of existing examples. Ask if you
> have specific questions.
>
> Ian
>
>> Ian Lance Taylor-3 wrote:
>>>
>>> yazdanbakhsh <amir.yazdanbakhsh@gmail.com> writes:
>>>
>>>> Please assume I'm working with the MIPS. There is a little difference
>>>> between the MIPS and what I'm actually working on it. How can I remove
>>>> immediate logical shift right/left from the compiler?
>>>> I mean If I want the programmer writes an immediate shift, It is
>>>> compiled
>>>> to
>>>> the two instructions:
>>>>
>>>> sll %2,%2,5
>>>>
>>>> changed to:
>>>>
>>>> addi %3,%0,5
>>>> sllv %2,%2,%3
>>>
>>> Find the insn which generates sll. Change the operand constraints and
>>> predicates to reject an immediate operand.
>>>
>>> E.g., in mips.md this is:
>>>
>>> (define_insn "*<optab><mode>3"
>>> [(set (match_operand:GPR 0 "register_operand" "=d")
>>> (any_shift:GPR (match_operand:GPR 1 "register_operand" "d")
>>> (match_operand:SI 2 "arith_operand" "dI")))]
>>> "!TARGET_MIPS16"
>>> {
>>> if (CONST_INT_P (operands[2]))
>>> operands[2] = GEN_INT (INTVAL (operands[2])
>>> & (GET_MODE_BITSIZE (<MODE>mode) - 1));
>>>
>>> return "<d><insn>\t%0,%1,%2";
>>> }
>>> [(set_attr "type" "shift")
>>> (set_attr "mode" "<MODE>")])
>>>
>>>
>>> For operand 2, change the predicate to register_operand and remove the
>>> 'I' constraint.
>>>
>>> Ian
>>>
>>>
>>
>> --
>> View this message in context:
>> http://old.nabble.com/Question-about-Machine-Description-tp1026428p28447744.html
>> Sent from the gcc - Dev mailing list archive at Nabble.com.
>
>
--
View this message in context: http://old.nabble.com/Question-about-Machine-Description-tp1026428p28449607.html
Sent from the gcc - Dev mailing list archive at Nabble.com.
next prev parent reply other threads:[~2010-05-04 16:05 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-10-04 3:59 Balaji V. Iyer
2005-10-04 4:38 ` Ian Lance Taylor
2005-10-04 4:48 ` Balaji V. Iyer
2005-10-04 6:46 ` Ian Lance Taylor
2005-10-06 13:38 ` Richard Sandiford
2010-05-03 10:22 ` yazdanbakhsh
2010-05-03 20:00 ` Ian Lance Taylor
2010-05-03 20:11 ` yazdanbakhsh
2010-05-03 20:16 ` Ian Lance Taylor
2010-05-04 14:29 ` yazdanbakhsh
2010-05-04 15:04 ` Ian Lance Taylor
2010-05-04 16:05 ` yazdanbakhsh [this message]
2010-05-04 16:40 ` Ian Lance Taylor
2010-05-06 16:44 ` yazdanbakhsh
2010-05-06 20:19 ` Ian Lance Taylor
2010-05-09 15:36 ` yazdanbakhsh
2010-05-10 4:43 ` Ian Lance Taylor
2010-06-03 6:11 ` yazdanbakhsh
2010-06-03 7:01 ` Ian Lance Taylor
2010-06-05 18:15 ` yazdanbakhsh
2010-06-05 20:49 ` Ian Lance Taylor
2010-06-05 20:51 ` yazdanbakhsh
2010-06-06 15:30 ` Ian Lance Taylor
2010-06-15 9:30 ` yazdanbakhsh
2010-06-15 9:45 ` Revital1 Eres
2010-06-15 12:15 ` yazdanbakhsh
2010-06-15 12:17 ` Manuel López-Ibáñez
2010-06-15 12:29 ` yazdanbakhsh
2010-06-15 17:37 ` Ian Lance Taylor
2010-05-06 9:08 ` yazdanbakhsh
2010-05-03 20:22 ` yazdanbakhsh
2010-05-03 20:41 ` yazdanbakhsh
2010-05-03 21:23 ` yazdanbakhsh
2010-05-04 3:16 ` Ian Lance Taylor
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