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* A new x86 patch for egcs
       [not found] <199804091140.LAB00024@iron.rcp.co.uk>
@ 1998-04-09 19:56 ` H.J. Lu
  1998-04-10  0:39   ` Jeffrey A Law
  0 siblings, 1 reply; 2+ messages in thread
From: H.J. Lu @ 1998-04-09 19:56 UTC (permalink / raw)
  To: grahams; +Cc: law, egcs

> 
> 
> 
> HJ
> 
> Isn't there another instance of this problem later on in i386.md
> just before the movsf_push
> 

Here is the new patch.

H.J.
---
Thu Apr  9 17:08:12 1998  H.J. Lu  (hjl@gnu.org)

	* config/i386/i386.md (movqi+1): Handle invalid QI register.
	(movsf_push-1): Likewise.

Index: i386.md
===================================================================
RCS file: /home/work/cvs/gnu/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.1.1.12
diff -u -r1.1.1.12 i386.md
--- i386.md	1998/04/09 16:40:24	1.1.1.12
+++ i386.md	1998/04/09 23:57:44
@@ -1105,7 +1105,6 @@
     return AS2 (xor%L0,%k0,%k0);
 
   if (operands[1] == const1_rtx
-      && !NON_QI_REG_P (operands[0])
       && (link = find_reg_note (insn, REG_WAS_0, 0))
       /* Make sure the insn that stored the 0 is still present.  */
       && ! INSN_DELETED_P (XEXP (link, 0))
@@ -1114,8 +1113,14 @@
       && no_labels_between_p (XEXP (link, 0), insn)
       /* Make sure the reg hasn't been clobbered.  */
       && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
-    /* Fastest way to change a 0 to a 1.  */
-    return AS1 (inc%B0,%0);
+    {
+      /* Fastest way to change a 0 to a 1.
+	 If inc%B0 isn't allowed, use inc%L0.  */
+      if (NON_QI_REG_P (operands[0]))
+	return AS1 (inc%L0,%0);
+      else
+	return AS1 (inc%B0,%0);
+    }
 
   /* If mov%B0 isn't allowed for one of these regs, use mov%L0.  */
   if (NON_QI_REG_P (operands[0]) || NON_QI_REG_P (operands[1]))
@@ -1160,6 +1165,7 @@
     return AS2 (xor%B0,%0,%0);
 
   if (operands[1] == const1_rtx
+      && ! NON_QI_REG_P (operands[0])
       && (link = find_reg_note (insn, REG_WAS_0, 0))
       /* Make sure the insn that stored the 0 is still present.  */
       && ! INSN_DELETED_P (XEXP (link, 0))

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: A new x86 patch for egcs
  1998-04-09 19:56 ` A new x86 patch for egcs H.J. Lu
@ 1998-04-10  0:39   ` Jeffrey A Law
  0 siblings, 0 replies; 2+ messages in thread
From: Jeffrey A Law @ 1998-04-10  0:39 UTC (permalink / raw)
  To: H.J. Lu; +Cc: grahams, egcs, wilson

  In message < m0yNROX-00058wC@ocean.lucon.org >you write:
  > Here is the new patch.
  > 
  > H.J.
  > ---
  > Thu Apr  9 17:08:12 1998  H.J. Lu  (hjl@gnu.org)
  > 
  > 	* config/i386/i386.md (movqi+1): Handle invalid QI register.
  > 	(movsf_push-1): Likewise.
Your patch was better than mine (more complete and generates better
code).  So I installed your patch (which removed mine as a nice
side effect :-)

Thanks!
jeff

^ permalink raw reply	[flat|nested] 2+ messages in thread

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     [not found] <199804091140.LAB00024@iron.rcp.co.uk>
1998-04-09 19:56 ` A new x86 patch for egcs H.J. Lu
1998-04-10  0:39   ` Jeffrey A Law

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