Slow switch on Pentium

Slow switch on Pentium

[Bernd Paysan]

Hi!

Since the Pentium (I+II) and most of the cloner (K5 and K6) have
separated, but coherent I and D caches, and a prohibited policy for
duplicated lines (no cache lines are duplicated), a switch statement on
a pentium may take quite a performance hit, see for example

http://www.complang.tuwien.ac.at/misc/pentium-switch/

The obvious solution (put the jump table into the ro-data segment)
doesn't work for -fPIC code. My idea is the following:

Replace the jump table in text segment #ifdef's (in final.c) with an
if(JUMP_TABLE_IN_TEXT_SEGMENT) { statement, which would be true or false
for architectures without I/D cache coherency (the compiler will strip
off the dead code, anyway), and fpic_mode for the Pentium. For switch
statements on -fPIC code, padding at least 21 bytes and aligning to the
next cache line (.align 5) helps, too, but the padding is very processor
dependent (since it depends on the length of the prefetch queue), and I
presume on the PPro it's worse. It could help if all jump tables are
emitted at the end of the file (then only one gap is necessary; make it
just several cache lines large).

-- 
Bernd Paysan
"Late answers are wrong ansers!"
http://www.informatik.tu-muenchen.de/~paysan/

Re: Slow switch on Pentium

[Jeffrey A Law]

  In message <345D9A56.6969@hl.siemens.de>you write:
  > Hi!
  > 
  > Since the Pentium (I+II) and most of the cloner (K5 and K6) have
  > separated, but coherent I and D caches, and a prohibited policy for
  > duplicated lines (no cache lines are duplicated), a switch statement on
  > a pentium may take quite a performance hit, see for example
  > 
  > http://www.complang.tuwien.ac.at/misc/pentium-switch/
  > 
  > The obvious solution (put the jump table into the ro-data segment)
  > doesn't work for -fPIC code. My idea is the following:
  > 
  > Replace the jump table in text segment #ifdef's (in final.c) with an
  > if(JUMP_TABLE_IN_TEXT_SEGMENT) { statement, which would be true or false
  > for architectures without I/D cache coherency (the compiler will strip
  > off the dead code, anyway), and fpic_mode for the Pentium. 
Yes.  As of egcs-1.1, the most x86 ports prefer to put jump tables into the
readonly data section.

jeff