From: Bill Currie <bcurrie@tssc.co.nz>
To: Joern Rennecke <amylaar@cygnus.co.uk>
Cc: law@cygnus.com, ak@muc.de, egcs@cygnus.com
Subject: Re: Feature request: ability to describe x86 register halves as contraints.
Date: Thu, 02 Jul 1998 15:15:00 -0000 [thread overview]
Message-ID: <359BFC8F.124B@tssc.co.nz> (raw)
In-Reply-To: <199807021720.SAA07510@phal.cygnus.co.uk>
Joern Rennecke wrote:
>
> Why don't you just re-number the registers so that their endianness matches
> that of memory?
I'd thought of that, but the problem is the floating point regs. This
would work nicely for the integer registers, but the i860 groups the fp
regs into pairs for DI mode regs:
MSW LSW
%f1 %f0
%f3 %f2
...
%f31 %f30
And the pairs must always be referred to by the lower regiters (%f0, %f2
... %f30).
Bill
--
Leave others their otherness
next prev parent reply other threads:[~1998-07-02 15:15 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <359ABD84.2FC4@tssc.co.nz>
1998-07-02 1:39 ` Jeffrey A Law
1998-07-02 1:39 ` Bill Currie
1998-07-02 1:39 ` Jeffrey A Law
1998-07-03 0:12 ` Bill Currie
1998-07-02 11:02 ` Joern Rennecke
1998-07-02 15:15 ` Bill Currie [this message]
1998-07-02 15:15 ` Joern Rennecke
1998-07-01 13:20 Michael Meissner
1998-07-01 20:15 ` Joern Rennecke
-- strict thread matches above, loose matches on Subject: below --
1998-06-29 20:41 ak
1998-06-30 0:42 ` Richard Henderson
1998-06-30 4:50 ` ak
1998-06-30 19:49 ` Alan Modra
1998-06-30 19:49 ` Andreas Kleen
1998-06-30 14:08 ` Jeffrey A Law
1998-06-30 9:24 ` Richard Henderson
1998-06-30 1:02 ` Jeffrey A Law
1998-06-30 11:53 ` Joern Rennecke
1998-06-30 11:53 ` Jeffrey A Law
1998-07-01 3:42 ` Richard Henderson
1998-06-30 15:15 ` Bill Currie
1998-06-30 15:26 ` Jeffrey A Law
1998-06-30 23:15 ` Bill Currie
1998-06-30 19:49 ` Jeffrey A Law
1998-07-01 10:51 ` Joern Rennecke
1998-07-01 10:51 ` Jeffrey A Law
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