From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7562 invoked by alias); 22 Oct 2002 19:15:47 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 7554 invoked from network); 22 Oct 2002 19:15:46 -0000 Received: from unknown (HELO tnt.isi.edu) (128.9.128.128) by sources.redhat.com with SMTP; 22 Oct 2002 19:15:46 -0000 Received: from isi.edu (nitro.isi.edu [128.9.208.207]) by tnt.isi.edu (8.11.6/8.11.2) with ESMTP id g9MJFja26617; Tue, 22 Oct 2002 12:15:45 -0700 (PDT) Message-ID: <3DB5A3E0.90603@isi.edu> Date: Tue, 22 Oct 2002 15:14:00 -0000 From: Spundun Bhatt User-Agent: Mozilla/5.0 (X11; U; SunOS sun4u; en-US; rv:0.9.4.1) Gecko/20020518 Netscape6/6.2.3 X-Accept-Language: en-us MIME-Version: 1.0 To: Spundun Bhatt CC: Hans-Peter Nilsson , gcc@gcc.gnu.org Subject: PLEASE DISREGARD MY PREVIOUR MAIL Re: machine description porting question. References: <3DB5A332.2080308@isi.edu> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2002-10/txt/msg01372.txt.bz2 hit the send button before completing the mail!! :( very sorry about that. Spundun Spundun Bhatt wrote: > Hi, I am redirecting my message from the gcc-bugs list to here. > I still have many confusions about creating temp registers in machine > description. > > Hans-Peter Nilsson wrote: > >> On Fri, 18 Oct 2002, Spundun Bhatt wrote: >> >>> Hi, >>> I am porting gcc to a new platform and it seems this mailing list is >>> the >>> closest match. My apologies if this is not the correct place. >>> >> >> gcc@ is better. >> >>> The machine that I am porting to has an instruction set similar to IBM >>> rs6000, so we have taken rs6000 config files as the tmplate and are >>> trying to make modifications to it. >>> My question is mainly regarding adding a temporary register in any insn >>> definition in the machine description file. >>> >> >> It's not really "mainly", but a special case. (Getting a >> temporary register is done by other solutions in other >> contexts.) >> > I am still trying to get hold of -one- way to do this. :) > >> >>> the scenario: >>> my machine doesnt have a compare instruction so I want to use subc >>> instruction (subtract and modify cc). >>> The compare instruction on powerpc looks similar to cmp RA,RB while >>> subtract instruction on my architecture looks like SUBC rD,rA,rB. >>> So gcc has to allocate a temporary register for rD, and I dont know how >>> to go about that. >>> >> >> You make the compare instruction pattern a define_expand which >> expands to the subtract insn. Or, since you say your machine is >> > I tried as you but couldnt get it working. Details follow. > >> >> rs6000-like, you use the same expand-compare-insn-in-the-cc-user >> method used there, and expand to a *subtraction* (e.g. >> gen_subsi3) in your equivalent to rs6000_generate_compare. You >> get the temporary result register from gen_reg_rtx (mode). >> > I think this expand-compare.... is some mnemonic that you came up with > and I didnt understand, because I couldnt grep it in the cvs code :). > Here I need to clarify that the version of gcc that I am working with > is a branch from gcc 2.95.2 patched by motorola for the altivec > instruction set. In 2.95.2, the rs6000_generate_compare does not exist > so I couldnt try this sugession. > >> >> brgds, H-P >> >> > the following is the snipped part of my original mail. > > >