From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26750 invoked by alias); 7 Jan 2003 19:53:27 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 26743 invoked from network); 7 Jan 2003 19:53:26 -0000 Received: from unknown (HELO touchme.toronto.redhat.com) (216.138.202.10) by 209.249.29.67 with SMTP; 7 Jan 2003 19:53:26 -0000 Received: from redhat.com (tooth.toronto.redhat.com [172.16.14.29]) by touchme.toronto.redhat.com (Postfix) with ESMTP id E70718000E7; Tue, 7 Jan 2003 14:53:13 -0500 (EST) Message-ID: <3E1B30F0.343E4B81@redhat.com> Date: Tue, 07 Jan 2003 20:17:00 -0000 From: "Vladimir N. Makarov" X-Accept-Language: en MIME-Version: 1.0 To: Jim Wilson Cc: David Edelsohn , gcc@gcc.gnu.org Subject: Re: RCSP and modulo scheduling References: <200301062308.SAA23816@makai.watson.ibm.com> <3E1A171B.5DD49C23@redhat.com> Content-Type: text/plain; charset=koi8-r Content-Transfer-Encoding: 7bit X-SW-Source: 2003-01/txt/msg00371.txt.bz2 Jim Wilson wrote: > > Is RCSP suppose to be a complete solution for software pipelining > > or used in conjunction with modulo scheduling? The GCC IA-64 Wish List > > and GCC IA-64 Summit both seem to imply that RCSP is a fallback when > > modulo scheduling cannot be applied. Should both be implemented and work > > together for a complete solution? > > There was a previous thread that discussed some of the issues here. > See for instance... > http://gcc.gnu.org/ml/gcc/2002-09/msg01263.html > > Just one addition for the message mentioned by Jim: " Machine independent implementation of modulo scheduling requires to use the old or DFA pipeline description. Unfortunately, the DFA pipeline hazard recognizer is not good enough to support modulo scheduling (it needs more interface functions). But the support could be provided." DFA pipeline hazard recognizer could be easily used for modulo scheduling without the additional support. To implement modulo scheduling we need to make a union of the state after instruction issue and the states gotten from the it by advancing the simulated processor cycle by II * n, where II is the initiation interval and n is 1, 2, 3 and so on. N could be constrained by a value which results in the state designating no functional unit reservations. Actually, we could implement the union of states as simply a set of the states. It could be a part of module scheduling not the pipeline hazard recognizer interface. It is easy although usually recognizing pipeline hazards for software pipelining (reservation tables are usually used there) is more complicated than the same thing for insn scheduling. Vlad